This argument is needed in case of platforms that have different
modules padding in xcc binaries.
Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
On the IRQ_STEER cascaded interrupt controller we have 512 interrupts
mapped to 8 HW interrupt lines. Each of these HW interrupt lines
supports 64 interrupts, however we only have the first 32 interrupts
available in hardware.
Actual support for IRQ_STEER will arrive in a future commit.
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
On some platforms, you can have a number of hardware interrupts but a
different number of child interrupts per cascaded interrupt controller.
This commit exposes this separation but does not take advantage of it
yet. On most platforms, the definitions PLATFORM_IRQ_HW_NUM and
PLATFORM_IRQ_CHILDREN are equal.
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
src/include/sof/trace/trace.h:309:32: error: 'type' may be used uninitialized in this function [-Werror=maybe-uninitialized]
This happens when hdr is NULL (even if it may never be at runtime the
compiler still complains) and verbose traces are enabled.
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
Fixes simultaneous playback and capture on byt/cht platforms.
It's a temporary fix and will be replaced with the proper solution
soon.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Unifies dw_dma_release function implementation to work
for all DMA working modes. Since we are now supporting
copying as much data as possible in host in all modes,
we can make this unification.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Implements copying as much as possible for one shot copy mode.
Previously we were always copying only one period of data,
which was problematic in case of SRC components inside of
pipeline. Also split transfer hasn't been handled correctly
in case of double split. This patch reimplements the copy
and fixes all the mentioned problems.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Returns SOF_TASK_STATE_COMPLETED on xrun. Otherwise if
the xrun happens during playback preload phase, we'll end up
in the infinitely processed task.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Byt doesn't have enough memory to handle buffer size
increase from updating media pipeline's pcm_max_rate to
96kHz. So limit it to 48khz.
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
This PR fixes bug that makes active FIFOs count go below 0,
if you call stop after pause.
Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
The buffer frame size calculation has obvious issues by
doing division instead of multiplication. On the other
hand we can't do decimal calculations in M4. So fix this
by introducing new macro for buffer frame size where we
multiply samplerate and schedule_period and divide by
1000000.
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
Aligned with the cAVS 1.8+ IPC HW definition.
Definitions common for sideband IPC version moved to a shared header.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
IPC request flow changed, call to mailbox_validate() moved to the
platform specific IPC code. This function copies the request from
the mailbox buffer to the global ipc buffer while the source
(mailbox) may be implemented differently on a specific platform
depending on the available hw and power mode. Therefore moved to
the platform code for easier re-implementation specific per platform.
The response part remains common, mailbox based. Common code that
sends simple response back is deduplicated as part of the common
generic ipc_cmd() logic.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
This patch alters topologies those use pipelines definitions from
intel-generic-dmic.m4. The 48 kHz and 16 kHz capture pipelines are
changed to use pipe-eq-capture instead of pipe-volume-capture. The new
pipeline contains volume but also an IIR EQ set for second order
high-pass with 50 Hz cut-off frequency. The IIR includes +20 dB
gain. The volume max is decreased by 10 dB due to the amplifying
IIR add.
The gain in IIR helps with too low capture loudness with default 0 dB
setting for volume. Further gain can be achieved with volume control.
The high-pass filter fixes the issue of too slow DCCOMP settling in
DMIC platform hardware. With IIR add the DMIC unmute ramp is shortened
to 200 ms from 400 ms in the 48 kHz pipeline. In 16 kHz pipeline the
400ms unmute is preserved due to slower DCCOMP settling time.
The min. channels count of two is replaced by pipeline channels count
macro to prevent corrupt capture to happen by capturing as 2ch from
4ch source.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch replaces minimum channel count two by PIPELINE_CHANNELS to
avoid corrupted capture audio due to capturing other channel count
than what the DAI is configured for.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch fixes the wrong file path to output example EQs and places
an identifier string to high-pass responses used in topology embedded
filter setup. The identifier is needed to correctly refer in topology
to right response when there are several similar type EQs in the
topology e.g. two separate IIR filters.
A new 16 kHz rate high-pass filter export is added into the script to
be used in voice pipelines.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
In order to avoid code duplication for new IMX DAIs
we introduce generic DAI I/O access functions:
* dai_read
* dai_write
* dai_update_bits
dai_* I/O access functions should replace dmic_*/ssp_* I/O functions
but as for the first patch we only make dmic_*/ssp_* call into dai_*
functions.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
cmocka pipeline connect unit test is checking the successful
connection from frames count set in components. However the frames
are not set in pipeline complete if we set the frames from stream
parameters. So check now that the pipeline pointer has been set
and matches the pipeline in high level test function.
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
Enable setting pcm min and max rate from top level m4 pipeline macro.
This way it is possible to configure the whole pipeline to correct
samplerate range in 1 file. Previously you needed to modify the pipeline
macros where the rate was hardcoded. As the frame count is calculated
from pcm/dai rate and scheduling time the frame count is obsolete.
Introduce pipeline rate parameter to help configuring components with
fixed output rate. We can't deduce this from pcm range since for example
src might accept bigger max rate than the following dai. Even though the
parameter is named "pipeline rate" it essentially means the "final"
output rate to which this pipeline is connected to (dai or other
pipeline). In capture pipelines it means the originating fixed dai rate.
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
Previously frame count was coming as topology pipeline parameter. As the
frame count might change because of some components have fixed
samplerate, we might as well calculate it from the stream parameters.
Component base struct will have new member output_rate, which the
component should set if it has fixed output rate (like SRC). Not setting
it or 0 means it can be whatever the pipeline decides. Components with 0
output_rate will have frames = (stream) sample_rate / (pipeline)
deadline. Components downstream to fixed output rate will obey the fixed
rate / period.
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
DMIC32 and DMIC16 are just confusing. It's not clear if the numbers
refer to kHz or bits. Rename to make the names self-explanatory.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Not all HDaudio platforms have DMIC support, generate solution without
any DMIC. This will be used in combination with NHLT information (or
kernel module parameter) by the driver to automatically select the
relevant topology.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Adding static libraries properly may be troublesome for developers
that are not familiar with CMake, so function that makes it easier
should be useful.
Usually developer will just add sources directly to the target.
Using static libraries should be limited just to closed / precompiled
3rd party components.
Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
Target dependencies have to be added in the same CMakeLists in which
they are declared. CMake interface library is needed to enable adding
static libraries to sof target from subdirectories.
Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
ESAI implementation is still dummy, anyhow we need to initialize ESAI
spinlock in order to avoid FW crashes.
Similar with commit 2ee7a24f97 ("byt: hsw: ssp: move spinlock init
to earlier stage") we initialize the spinlock in an early stage at
dai_init.
We started to notice the crash after commit f7abaf7b33 ("spinlock:
allocate spinlocks in uncached memory") which requires that the lock
must be dynamically allocated at init. Before, the lock was statically
allocated and there were no crashes.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
sof-pci-dev and sof-acpi-dev were renamed, so make sure we handle the
new names. The old ones are kept for backwards compatibility but will
be removed at some point.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
In theory we wouldn't need to explicitly load the rt700 driver but
doing so solves a race condition we will have to fix in the kernel at
some point.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
This is required for Cherrytrail/Baytrail Chromebooks.
Note that the driver still has problems but the scripts are fine.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
In function target_link_libraries visibility modifiers have to be
consistent, otherwise we will get error while trying to use modifier,
if it wasn't used in root CMakeLists.
Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
Fixes DMA_ACCESS_EXCLUSIVE flag for getting DMA.
We should rely on number of DMA users rather than
number of DMA channels. DMA channels are incremented
during DAI config, so it can potentially happen long
after DAI creation.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
This patch adds for HiFi3 xt-xcc compilation for an intrinsics
optimized direct form-II transposed (df2t) filter core version
that executes faster than the generic C version.
Due to HiFi3 instruction set the delay lines are changed from Q3.61
to Q17.47 format. It causes differences in bit-exactness but no
practical audio quality difference to generic C version.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch fixes two similar mistakes from all the s16/s24/s32 dual
sample computing FIR core that was introduced in a previous update.
The FIR processing frames count processed double amount of samples
in buffer that corrupted FIR delay line and also the output write
to component sink buffer swapped two successive samples within one
channel.
The filter cores for s16 and s24 were simplified a bit since they can
use single output write pointer.
The FIR header file used wrong xtensa header file for HiFi2 while
it should have been for hifi3. Though no issues were observed due to
this mistake.
A check for frames count greater than zero was added into the copy()
function for extra safety. Also the return value from
comp_get_copy_limits() is not checked since the function always
returns zero.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Fixes locking mechanism of spinlocks.
Current implementation hasn't worked at all,
so there wasn't any synchronization between cores.
I myself have broken it a long time ago.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Spinlocks need to be allocated in uncached memory region
in order to work properly and allow synchronization between
multiple cores. Atomic instructions used in xtensa implementation
don't go through cache automatically.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Moves interrupt_init after init_heap. During interrupt
initialization we need to allocate spinlock, so we need
already initialized memory map.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Moves spinlock initialization for byt and hsw platforms
to earlier stage. Otherwise the output will be undefined,
since we are using the spinlock before initializing it
in platform_init sequence.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Replaces spin_lock_* macros with irq_local_* macros
in many places. Most of the code doesn't need to keep
synchronization between cores. Setting critical section
by disabling local interrupts is enough. Spinlocks should
be used only in the places, where both cores have access.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Adds irq_local_enable and irq_local_disable macros to disable
and enable all IRQ sources for current core.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
This commit introduces the ingredients required for adding
fuzzing support in SOF. The main ingredients are as follows:
QEMU bridge: This creates the IO bridge to communicate with
the QEMU DSP
Core IA host support for BYT/CHT platforms: Provides the host
support for intializing the platform and communicating with
the QEMU DSP
Main application: The fuzzing application that sets up the
platform and initializes the communication with the QEMU DSP
Currently, running the fuzzer application only sets up the
platform IO bridge for communicating with the QEMU DSP,
boots the FW, parses the topology file and sets up the components
and connections in topology by sending the IPC messages to
the QEMU DSP. The next step is to add the fuzzing component
which will be responsible for sending fuzzed IPC messages
and monitoring the status.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
The topology parser in testbench can be re-used for
the other applications like the fuzzer. In order to
accomplish this, this commit does the following:
1. Separate the topology parser into a separate project
(tplg_parser) which implements the callbacks for parsing
all the components in topology.
2. Add support for parsing new components such as host
pcm, dai and mixer
3. Include the topology parser as an external project
in the testbench.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Adds cache operations to alloc functions to get full
synchronized memory map between different cores.
Memory allocations aren't done so often so we can
afford to go through cache and perform so many
wtb/inv operations. This change allows slave cores
for allocation from runtime heap, buffer heaps etc.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>