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sof/app/boards/intel_adsp_cavs25.conf

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zephyr: app: move main SOF app from zephyr samples Make the main SOF app part of SOF, where it belongs. No need for any overlays (which just duplicated the sample .conf anyways) and one place to build everything. This now does not depend on zephyr samples, which have a different purpose completely. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-13 10:22:07 +08:00
CONFIG_TIGERLAKE=y
tgl: hda: enable chain dma Enable building chain dma component on TGL platform Signed-off-by: Piotr Makaruk <piotr.makaruk@intel.com>
2022-11-29 20:35:46 +08:00
CONFIG_COMP_CHAIN_DMA=y
platform: tgl: Enable AMS Set config to enable AMS for CAVS25 platform. Signed-off-by: Krzysztof Frydryk <krzysztofx.frydryk@intel.com>
2022-10-19 20:41:48 +08:00
CONFIG_AMS=y
zephyr: app: move main SOF app from zephyr samples Make the main SOF app part of SOF, where it belongs. No need for any overlays (which just duplicated the sample .conf anyways) and one place to build everything. This now does not depend on zephyr samples, which have a different purpose completely. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-13 10:22:07 +08:00
CONFIG_LP_MEMORY_BANKS=1
CONFIG_HP_MEMORY_BANKS=30
board: intel_adsp_cavs25: Enable support for library loading Add the needed config options to enable the library loading support. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2023-07-25 17:48:33 +08:00
CONFIG_MM_DRV=y
CONFIG_INTEL_MODULES=y
CONFIG_LIBRARY_MANAGER=y
zephyr: app: move main SOF app from zephyr samples Make the main SOF app part of SOF, where it belongs. No need for any overlays (which just duplicated the sample .conf anyways) and one place to build everything. This now does not depend on zephyr samples, which have a different purpose completely. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-13 10:22:07 +08:00
CONFIG_RIMAGE_SIGNING_SCHEMA="tgl"
zephyr: enable core dump on tgl platforms We need to enable CONFIG_DEBUG_COREDUMP_MEMORY_DUMP_MIN according to comments in coredump_core.c: When dumping minimum information, the current thread struct and stack need to be dumped so debugger can examine them. Signed-off-by: Rander Wang <rander.wang@intel.com>
2023-06-01 17:21:26 +08:00
CONFIG_DEBUG_COREDUMP=y
CONFIG_DEBUG_COREDUMP_BACKEND_INTEL_ADSP_MEM_WINDOW=y
CONFIG_DEBUG_COREDUMP_MEMORY_DUMP_MIN=y
board: intel_adsp_cavs25: Disable DTRACE DTRACE is IPC3 only, it is not used anymore. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2023-07-17 18:01:59 +08:00
# DTRACE is IPC3 only, disable it
CONFIG_TRACE=n
app: Intel: switch cAVS2.5 configs to use IPC4 by default The IPC3 build is no longer supported for Intel cAVS2.5 target, so move the config overlay definitions as-is to the main board config file. To smoothen the transition, keep an empty IPC4 overlay file in the tree to allow developers to update build scripts. Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-08-17 01:28:42 +08:00
CONFIG_IPC_MAJOR_4=y
CONFIG_RIMAGE_SIGNING_SCHEMA="tgl-cavs"
CONFIG_PCM_CONVERTER_FORMAT_S16LE=y
CONFIG_PCM_CONVERTER_FORMAT_S24LE=y
CONFIG_PCM_CONVERTER_FORMAT_S32LE=y
CONFIG_PCM_CONVERTER_FORMAT_S24_3LE=y
CONFIG_PCM_CONVERTER_FORMAT_FLOAT=y
CONFIG_PCM_CONVERTER_FORMAT_S16_C16_AND_S16_C32=y
CONFIG_PCM_CONVERTER_FORMAT_S16_C32_AND_S32_C32=y
CONFIG_PCM_CONVERTER_FORMAT_S16_C32_AND_S24_C32=y
CONFIG_PCM_CONVERTER_FORMAT_S16_C32_AND_S16_C32=y
CONFIG_COMP_VOLUME_WINDOWS_FADE=y
CONFIG_COMP_DRC=y
Kconfig: Enable crossover and multiband-DRC by default This patch enables for TGL and MTL platforms as default to enable CI build tests, etc. Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2023-08-16 22:37:25 +08:00
CONFIG_COMP_CROSSOVER=y
CONFIG_COMP_MULTIBAND_DRC=y
App: Intel: Enable Aria build for TGL and TGL-H platforms Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2023-10-18 21:41:24 +08:00
CONFIG_COMP_ARIA=y
app: Intel: switch cAVS2.5 configs to use IPC4 by default The IPC3 build is no longer supported for Intel cAVS2.5 target, so move the config overlay definitions as-is to the main board config file. To smoothen the transition, keep an empty IPC4 overlay file in the tree to allow developers to update build scripts. Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-08-17 01:28:42 +08:00
# route SOF logs to Zephyr logging subsystem
CONFIG_SOF_LOG_LEVEL_INF=y
CONFIG_ZEPHYR_LOG=y
# use mtrace for IPC4 and disable etrace/ADSP backend
CONFIG_LOG_BACKEND_ADSP_MTRACE=y
CONFIG_LOG_BACKEND_ADSP=n
CONFIG_LOG_OUTPUT_FORMAT_LINUX_TIMESTAMP=y
CONFIG_LOG_FUNC_NAME_PREFIX_ERR=y
CONFIG_LOG_FUNC_NAME_PREFIX_WRN=y
CONFIG_LOG_FUNC_NAME_PREFIX_INF=y
CONFIG_LOG_FUNC_NAME_PREFIX_DBG=y
CONFIG_INTEL_ADSP_TIMER=y
CONFIG_FORMAT_CONVERT_HIFI3=n
CONFIG_PM=y
CONFIG_PM_DEVICE=y
CONFIG_PM_DEVICE_RUNTIME=y
CONFIG_PM_POLICY_CUSTOM=y
CONFIG_CLOCK_CONTROL_ADSP=y
CONFIG_CLOCK_CONTROL=y
CONFIG_ZEPHYR_NATIVE_DRIVERS=y
CONFIG_DAI=y
CONFIG_DAI_INIT_PRIORITY=70
CONFIG_DAI_INTEL_SSP=y
CONFIG_DAI_INTEL_DMIC=y
CONFIG_DAI_INTEL_ALH=y
CONFIG_DAI_INTEL_DMIC_NHLT=y
CONFIG_DAI_INTEL_HDA=y
CONFIG_DAI_DMIC_HW_IOCLK=38400000
CONFIG_INTEL_ADSP_IPC=y
CONFIG_DMA=y
CONFIG_DMA_DW_LLI_POOL_SIZE=100
CONFIG_DMA_DW_HW_LLI=y
CONFIG_DMA_DW_FIFO_PARTITION=y
CONFIG_DMA_INTEL_ADSP_GPDMA_HAS_LLP=y
CONFIG_HEAP_MEM_POOL_SIZE=8192