c03faf59c3
On TGL platform, when enable SR_IOV for PCI enumeration, system hung due to insufficient PCI resource. GFX VF needs lots of MMIO resource and it cannot be satisfied by SBL in 32 bit mode. To address this issue, this patch extends the bus 0 downgrade policy to further allow downgrading PCI bus 0 devices except for GFX. Now the DowngradeBus0 policy has following values: 0: Do not downgrade PCI devices on bus 0 1: Downgrade all PCI devices on bus 0 2: Downgrade all PCI devices on bus 0 but GFX 3: Reserved By default, it has the same behavior as before. If platform needs to download bus 0 devices but GFX, the new value 2 can be used. This has been tested on TGL, and it worked as expected. Signed-off-by: Maurice Ma <maurice.ma@intel.com> |
||
---|---|---|
.. | ||
InternalPciEnumerationLib.c | ||
InternalPciEnumerationLib.h | ||
PciAri.c | ||
PciAri.h | ||
PciCommand.c | ||
PciCommand.h | ||
PciEnumerationLib.c | ||
PciEnumerationLib.inf | ||
PciIov.c | ||
PciIov.h |