Current SBL build needs the actual FSP binary to pass the build.
This patch enables a mode to test the build without the actual FSP
bianry. It is useful for test before the FSP binary is available.
It is controlled by HAVE_FSP_BIN option. It can be overriden in
BoardConfig.py file.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch addressed an issue while detecting the
BOM ID for Upx platform which is causing the MRC
to fail.
Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
This will report pcie config space region as a reserved memory in e820
and let Linux use the PCI MMCONFIG which has bus range information.
If it is not reserved, the pcie config space region will be freed/available
for PCI devices.
Signed-off-by: Aiden Park <aiden.park@intel.com>
GpioConvert Tool converts Gpio config data between following
sets of formats:
[.h, .csv, .txt] ---> [.yaml, .dlt] and vice-versa
.dsc related conversion is deprecated starting from this commit.
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
Using ConfigEditor to save back DLT changes, it will produce two
PlatformId lines in DLT file. This patch removed the extra line.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
o This is a common HECI PCI config space across platforms which
return STS6 space.
o HeciGetManufactureMode() returns if the platform is in debug mode
(fuses unlocked) or production (fuses locked).
Signed-off-by: Divneil Rai Wadhawan <divneil.r.wadhawan@intel.com>
Current ConfigEditor produces the same result for
"Save full cfg data" vs "save cfg changes". This patch provided
a fix for it. It fixed#882.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
In ConfigEditor, while scrolling page using mouse middle wheel,
the Combo configuration items will change its default value. It
is because Combo control will bind MouseWheel event by default.
To address it, added code to unbind it explicitly.
It fixed#878.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch fixed link error for APL NOOPT build due to compiler
intrinsics functions. However, due to APL hardware requirements,
it is not feasible to fit NOOPT build into real flash. This
patch will not fix the NOOPT build error caused by code size issue.
For example, the following error might still occur for APL NOOPT
build:
Invalid the required fv image size 0xe3b0 exceeds the set fv image
size 0x6000
The APL SOC requires Stage1A to fit into 32KB. Since FSP-T will take
8KB, it only gives 24KB for SBL Stage1A code. NOOPT build will create
about 56KB for Stage1A, and it is impossible to fit into the layout.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Check for Write access permission during
Write/Erase Flash cycles for BIOS/FLAHD regions.
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
Since SBL could be built into either x86 or x64 mode, and the payload
can also be x86 or x64 mode. When mixed modes are used, it is required
to switch to proper mode first before calling into payload entrypoint.
This patch added this check to switch to required mode before calling
into payload entry point.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch expanded HECI service to include send, receive and
reset interface functions. This helps in making firmwareupdatelib.c
and PSDlib common across platforms.
Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
This will fix the ucode repo checkout issue on 'cfl' target.
FYI, here are simple steps to reproduce.
1) Build 'apl' target first
2) Build 'cfl' target -> fails to checkout ucode repo
Signed-off-by: Aiden Park <aiden.park@intel.com>
During X64 enabling, there was a pending task to enable 32bit
MultiBoot support. It is not implemented. This patch added the
support to allow X64 SBL to boot a 32bit MB image through thunking.
As part of this patch, the ThunkLib is separated from the FspApiLib
so that it can be shared by other component.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
The structure of ME_BIOS_PAYLOAD varies on silicons. So, it's moved to
silicon directory and common structures are in MeBiosPayloadDataCommon.h.
- MeBiosPayloadDataCommon.h in CommonSocPkg
- MeBiosPayloadData.h in the specific silicon package
Additionally, DEBUG_VERBOSE message level is used for HeciCore.
Signed-off-by: Aiden Park <aiden.park@intel.com>
This allows APL target to use the common HECI library.
The APL target uses the common HeciLib from CommonSocPkg,
and overrides MeChipsetLib for Apollake specific APIs.
Signed-off-by: Aiden Park <aiden.park@intel.com>
This allows CFL target to use the common HECI library as it is.
The CFL target uses both HeciLib and MeChipsetLib from CommonSocPkg,
and the unnecessary files are cleaned-up.
Signed-off-by: Aiden Park <aiden.park@intel.com>
This adds a common HECI library for the same APIs on all platforms.
New MeChipsetLib is intruduced for the silicon specific HECI APIs.
- Silicon/CommonSocPkg/Library/HeciLib
- Silicon/CommonSocPkg/Library/MeChipsetLib
Signed-off-by: Aiden Park <aiden.park@intel.com>
Different SoCs can use different versions of
Gen graphics and subsequently may use different
versions of the IGD Op Region; the OVER variable
will determine how the OS GFX driver interprets
the IGD Op Region provided in ACPI space.
Signed-off-by: James Gutbub <james.gutbub@intel.com>
Currently the build tool will always find FSP binaries from
Silicon'\self._board.SILICON_PKG_NAME\FspBin folder.
This patch enhance the build tool to support to get FSP from
_FSP_PATH_NAME. If _FSP_PATH_NAME is not specified, the default
behavior is same with current build.
If user wants to use a different one, they could override it
in BoardConfig.py as below:
self._FSP_PATH_NAME = 'Silicon/Fsp'
Signed-off-by: Guo Dong <guo.dong@intel.com>
This patch added support to allow platform to add specific include
folders for the build. All include paths will be relative to the
SBL $(WORKSPACE).
To eanable this feature, please add similar definitions as below
into BoardConfig.py. For example,
self._EXTRA_INC_PATH = ['Silicon/QemuSocPkg/Include/Fsp']
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch did the following
1) Added common routines LocateVbtByImageId to look for VBT image using
ImageId provided by configuration data and GetVbtAddress.
2) GetVbtAddress routine will provide abstaction for all platforms
irrespective of multiple VBT or single VBT used by the platform.
3) LocateVbtByImageId routine is moved from platform local function to
common package.
4) VbtImageId configuration option defined in QEMU platform config is
moved to common configuration in CfgData_Common.yaml
5) ApolloLake VBT ID selection is now done using configuration data.
6) Added latest VBT binary for CFL, WHL is using existing VBT.
Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
Currently SBL library has GetDeviceAddr() to get the device
address based on device type and instance. This patch adds
SetDeviceAddr() to update a given device type and address so
that platform could update the device table dynamically.
Signed-off-by: Guo Dong <guo.dong@intel.com>
The SATA and USB HwPart usage for BootOption
config data varies from the other block device
types. This patch adds clarification to explain
the meaning of HwPart for these 2 media types
respectively.
Signed-off-by: James Gutbub <james.gutbub@intel.com>
Current ConfigEditor relies on the original input data format in YAML
to determine how to represent data in GUI. For example, if the data
value is HEX in YAML, then the data will be displayed in HEX format.
This patch switched to use the specified format type to reformat the
value string so that the display is always consistent with the required
format type.
It fixed#844.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch add code to check OsBootOptionList for NULL to avoid
NULL pointer dereference.
Signed-off-by: Praveen Hp <praveen.hodagatta.pranesh@intel.com>
This patch fixed GCC x64 Crypto boot issue. The issue was related
to the calling convention. "EFIAPI" was missing for several ASM
provided functions.
It also fixed#834.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch adds following chnages,
- Revise FSP github commit id to use latest FSP 7.0.74.20 and
also rename FSP.fd to Fsp.fd to fix GCC build error.
- Add latest Microcode Release Tag.
- starting from FSP 7.0.65.50 FSP shares same stack with Bootloader
to run FSP-M, hence adjust stack using FSP_M_STACK_TOP variable in
BoardConfig.py file.
Test: Build and Boot test on CFL,WHL platforms and verified successfull
boot till yocto OS.
Signed-off-by: Praveen Hp <praveen.hodagatta.pranesh@intel.com>
There are several definitions that have
been added to the IntelFsp2Pkg in order
to support FSP v2.2. These changes are
backwards compatible with FSP 2.0 and 2.1.
In order to support x64 build of Slim
Bootloader we have overriden the VOID*
and FSP_EVENT_HANDLER[*] to UINT32 since
FSP only supports 32-bit build/pointers
currently.
For more info please see the Intel
FSP External Architecture Specification
v2.2 at the site below:
https://www.intel.com/content/www/us/en/intelligent-systems/intel-firmware-support-package/intel-fsp-overview.html
Signed-off-by: James Gutbub <james.gutbub@intel.com>
When HAVE_VERIFIED_BOOT is disabed in the latest SBL, the build will
fail because of missing key hashes. This patch resolved this issue.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch added support to launch payload module on top of OsLoader.
Comparing with payload binary, payload module will utilize the API
services provided by OsLoader, so it will have smaller size. Other
than this, the concept is exactly same as normal payload. For payload
module, additional parameter is required to pass into the payload
module entry point.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch added required changes to support SBL setup for QEMU.
To enable this, set 'self.ENABLE_SBL_SETUP = 1' in BoardConfig.py.
In QEMU command line, use '-boot order=a' to trigger launching
Setup instead of normal boot flow.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Maurice Ma