SBL depends on flash map to locate all component info. It is
mandatory to keep flash map. HAVE_FLASH_MAP config option should
be removed. This patch removed this config option and the related
PcdFlashMapEnabled PCD.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
If FPDT->Length is just the size of FIRMWARE_PERFORMANCE_TABLE,
BOOT_PERFORMANCE_TABLE and S3_PERFORMANCE_TABLE are overwritten
by the next Table in ACPI init. Therefore, make the size in the
header as sizeof(INTERNAL_FIRMWARE_PERFORMANCE_TABLE) so that
the next table starts after INTERNAL_FIRMWARE_PERFORMANCE_TABLE.
Otherwise, S3 Perf Table can't be located on S3 resume path.
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
Error: conversion from 'UINT32' to 'UINT8', possible loss of data
MADT ProcessorId and ApicId has the size of UINT8. Cast the size from UINT32 to UINT8.
Change-Id: I3f46b2015b0d21c2b3e2f9389ecb8d5364ed5a5e
Signed-off-by: Aiden Park <aiden.park@intel.com>
Currently, the common hook UpdateMadt() was updating fixed size of
ProcessorLocalApic entries.
This allows the hook to append ProcessorLocalApic entries with the number
of detected CPUs in runtime.
Signed-off-by: Aiden Park <aiden.park@intel.com>
To make PlatformUpdateAcpiTable() hook its contents and length easily,
allocate a memory from low to high and appends each tables to higher direction
Signed-off-by: Aiden Park <aiden.park@intel.com>
By design, BootloaderCommonPkg should not refer to
BootloaderCorePkg. Hence removed those references in
the .inf files in Common pkg.
Moving SmbiosInitLib to Core pkg as it is a core feature.
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
Since HASH_INDEX_* is a 1:1 mapping with
COMP_TYPE_* we can remove HASH_INDEX_* and
replace with COMP_TYPE_*.
Also fix some misspellings.
Signed-off-by: James Gutbub <james.gutbub@intel.com>
This patch added a ContainerLib to support load and location a
component from a specified container. It copies the component
from flash to memory, authenticate it, and then decompress it if
required. It can also be used to support load component from flash
map in SBL stage2 or payload, such as payload or e-payload.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
There are cases where temporary memory is required in stages. Since
MemoryAllocationLib instance for stages has no de-allocation function,
it needs special handling. This patch added temporary memory management
into standard MemoryAllocatoinLib interface.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
SmmBase Info should not be expected by MpInit if the
platform/payload has not updated the Tseg region.
Check for the COMM signature before proceeding to Rebase.
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
Restore the register information saved during the
normal boot, on S3 resume path for UEFI payload only.
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
Synced up MdePkg, IntelFsp2Pkg and BaseTools to EDK2 stable tag
edk2-stable201905.
There are several changes for MdePkg and BaseTools.
MdePkg:
- Support light print to reduce SBL size
MdePkg\Library\BasePrintLib\PrintLibInternal.c
MdePkg\Include\Library\DebugLib.h
- TCG TPM2 spec changes and remove dependencies
MdePkg\Include\IndustryStandard\UefiTcgPlatform.h
MdePkg\Include\IndustryStandard\Tpm2Acpi.h
- Use old NVM protocol file
MdePkg\Include\Protocol\NvmExpressPassthru.h
- Removed unused files
BaseTools:
- Added LZ4 support
- Removed unused files
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch will add support for updating multiple firmwares
using a single capsule image.
Following modifications are made for existing firmware update flow
1) Gather and validate capsule image
2) State Machine will be set to capsule processing state.
3) Signature of the capsule image is now stored in reserved region
During each reboot until the end of firmware update, stored signature
will be compared against the capsule image signature to make sure
capsule image is not modified until the end of firmware update.
4) Process Capsule image to gather firmware images
5) Each Firmware image information will be stored in reserved region
using FW_UPDATE_COMP_STATUS. Update pending will be marked to
update pending state indicating that this image is not processed.
6) Firmware update will use the reserved region comp structures starting
with the first image with update pending state, update the comp update
pending field to processing and applies the image. After the update, pending
field will be updated to Done and updates the status of the update in the
component structure and moves on to next image found.
7) After all the component structure in the reserved region updating pending
field are set to Done. Firmware update mode is exited.
Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
Some platform might need do some platform specific init
on all the threads. So add a MP hook using a PCD.
Np impact for the platform that doesn't need this hook.
This patch also enable InSMM bit for APL.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Copying the MdePkg BaseMemoryLibSse2 library into
SBL for faster CopyMem and other routines to improve
boot performance every where except for Stage1A &
Stage1B due to 'movntdq' usage limitation in earlier
stages. Remove all of the X64 files since SBL is compiled
as 32-bit. Also patch PCI enumeration code to perform
manual memory copying (using SSE2 CopyMem gives some
issue as tested on APL).
The BaseMemoryLibSse2 folder was copied from EDK2
GitHub based on the following commit ID:
9344f0921518309295da89c221d10cbead8531aa
Signed-off-by: James Gutbub <james.gutbub@intel.com>
This patch added support for FWST ACPI table. This table
contains generic address structure which has pointer to the
EFI System Resource Table.
ESRT table for now supports only system firmware. This table
will provide the operating system and tools knowledge of what
is the last attempt status and version of the system firmare
update.
Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
This patch enabled DISABLE_NEW_DEPRECATED_INTERFACES build option by
default so that the deprecated APIs cannot be used in SBL source tree.
It is to enhance the coding for security.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Smm bases for all the procs need to be relocated on the
S3 resume path (as payload is not run) for Windows boot.
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
This patch adds FPDT table into ACPI table, and updates all
the performance data for S3 path.
It also update basic boot performance data for reset end.
Other boot performance data could be updated by UEFI payload.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Current code refers hash store as "key store". It is confusing
since there is no key stored in the image at all. Instead, the
public key hash is stored. The patch renames the KeyStore
to HashStore.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
BootloaderCoreLib use same File_GUID and Base_NAME
with BootloaderLib, this patch updates INF to fix
this issue.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Current MpFuncs.nasm used hard coded opcodes to support 16bit ASM.
It makes it difficult to maintain. Per suggestion, this patch
convered the 16bit opcodes into instruction directly.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
SBL has no intention to support SMI. However, on many hardware
platforms, there is no reliable way to prevent SMI from generating
through SMI IPI. In case it occurs, CPU will jump to the default
0x38000 location for execution, which exposes huge security issues.
The recommended solution is to do basic SMM base relocation and put
a dummy SMI handler (RSM) there for platform does not support SMI
disabling. In this way, the SMI will be ignored, and it also closes
the security concerns. This patch implemented basic SMM relocation.
It is under the control of a new PCD PcdSmmRebaseEnabled. By default,
it is disabled. To enable it, please set ENABLE_SMM_REBASE in
BoardConfig.py. As part of it, platform library needs to set
PcdSmramTsegBase and PcdSmramTsegSize properly in PreSiliconInit board
hook. Please take APL platform for reference.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
* Enable DebugAgentLib to support source level debug over serial
By default, source level debug is NOT enabled. ENABLE_SOURCE_DEBUG
needs to be set to 1 in BoardConfig.py of each Platforms.
- self.ENABLE_SOURCE_DEBUG = 1
As an initial drop, there are some limitations on APL platform.
- Stage1A does not include DebugAgentLib due to Stage1A size
limitation(32KB). Further optimization is required.
- DebugAgentLib supports ONLY POSTMEM debugging on APL currently.
Refer to EDKII Debugging:
- https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Debugging
- https://github.com/tianocore/tianocore.github.io/wiki/SourceLevelDebugPkg
Change-Id: Ia28c5470bc5755768f2b380cc1dabbcb8ee60f0d
Signed-off-by: Aiden Park <aiden.park@intel.com>
* Additional changes for DebugAgent
- Adjust stage size depending on ENABLE_SOURCE_DEBUG Pcd value
- Add PeCoffFindAndReportImageInfo
- Fix debugger hang at Shell
Change-Id: I11b41e5ad610fcb2999e9d43e5dd8f8899e8265a
Signed-off-by: Aiden Park <aiden.park@intel.com>
* Move PeCoffFindAndReportImageInfo() from LitePeCoffLib to DebugAgentLib
Change-Id: I2c4ab4f9561dfd0536da1820048f0e5f2660e2ab
Signed-off-by: Aiden Park <aiden.park@intel.com>
Maurice Ma