As per specification of the IAS-Image format
https://github.com/intel/iasimage/blob/master/docs/02_mcd.md
the signature and public key are optional.
As per specification of the header format
https://github.com/intel/iasimage/blob/master/docs/02_mcd.md#image-type
The 8th bit indicate if the signature is included, while the 9th bit
indicates whether the public key is included.
While the previous solution checked if public key is enabled, it did
not check if the signature is included, but rather assumed that it
is always included.
This will lead to a miss-calculation of the `IAS_IMAGE_END` and
`IAS_IMAGE_SIZE` which on the other hand will cause `IsIasImageValid()`
to fail, which will fail the loading of unsigned IAS-Images.
Signed-off-by: Jan Schlosser <jan.schlosser@outlook.com>
The PCI address consumed by CSME FW update library is in
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS format.
- when register offset is < 0x100, it is : bbddffrr
- when register offset is >= 0x100, it is : rrrbbddff00
Consider the two different cases in CsmePciReadBuffer()
Signed-off-by: Vincent Chen <vincent.chen@intel.com>
This allows to load and execute ELF32 or ELF64 format payloads
regardless of Ia32 or X64 SBL operation modes.
Signed-off-by: Aiden Park <aiden.park@intel.com>
This patch runs basic check during EXT FS initialization
by opening root directory to ensure superblock been
validated.
Signed-off-by: Stanley Chang <stanley.chang@intel.com>
This patch changes the return code of SearchDirectory
to EFI_NOT_FOUND when a file to search cannot be found
Signed-off-by: Stanley Chang <stanley.chang@intel.com>
When the bus master decoding was disabled by default in PCI bus, the
device driver should try to enable it on its own. However, eMMC
driver does not have the enabling code. It caused the eMMC access
failure.
It fixed#1153.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
In the Ext23Lib support for symbolic links was recently enabled
but there was a limitation imposed to use the CFG data boot
option filepath limit of 16 bytes which does not need to be also
be imposed on symbolic link paths. This will allow symbolic link
paths to be up to 260 characters long.
Signed-off-by: James Gutbub <james.gutbub@intel.com>
With recent code change of disabling all PCI bus master
by default, NVMe may not work in some platform (e.g., Qemu).
This patch set/clear bus master during NVMe init/deinit.
Signed-off-by: Stanley Chang <stanley.chang@intel.com>
Some of the boot option file paths used when
booting with OS Loader payload are failing
because the Ext23Lib does not support symbolic
soft links (e.g. ln -s <file> <link>). This
patch adds support for loading the soft link
succesfully.
Signed-off-by: James Gutbub <james.gutbub@intel.com>
SBL allows extra module to be called before tranfering into the main
boot option. For example, RTCM module can be called for boot option
with TCC feature support. This patch enabled this support. Since the
extra module might have different ARCH mode from current SBL mode,
thunk will be provided if mismatching is detected.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
SBL can support IA32 and X64 build. But this info is not indicated
in the SBL version info. This patch added one bit to indicate the
SBL is IA32 or X64.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
For non UEFI payload, SBL will install dummy SMI handler for
security concern. For UEFI payload, SMM rebasing is expected
to be done itself. This patch enabled this feature for APL and
CFL platform.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
On some build environment, NASM will fail to compile Thrun32To64.nasm.
It is because of "BITS 64" usage in WIN32. This patch removed the BITS
64 usage and used opcode prefix instead to resolve this issue.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch added thunk support from 32bit to 64bit. It allows SBL
to call 64bit API entry from 32 bit compatible mode. It is useful
when the payload mode is different from SBL mode.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch will enable CLANG toolchain build on Linux and Windows.
Currently CLANG toolchain build still needs Visual Studio to provide
nmake utility in Windows.
To build with CLANG, please add build option "-t clang". It assume
CLANG is installed at default path. It has been tested with SBL
QEMU x86 build.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
1) Add PCD PcdTccEnabled so that TCC could build out when disabled
2) Add HOB gTccRtctHobGuid produced by FSP if FSP support TCC V2
3) Add a common TCC config data in common platform package
4) Add a common TCC lib to update TCC RTCT table.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Current MTRR lib assumes the MTRR number is always 10. Instead,
this patch follows the IA manual to get the actual MTRR number
through MTRR capability register.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
EHL, TGL supports multiple OEM keys and their revocation
by CSE. This patch supports,
- CMDI interface to perform key revocation using
OEMKEYREVOCATION string in cmd file.
- EHL HECI APIs for OemkeyRevoke and to get key status
- FW componets are sorted as per required order.
CSME and BIOS should be signed with new keys and
both components would go together with capsule update.
Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
This patch fixes the multiple build issues which are observed
when ENABLE_SOURCE_DEBUG config is set to 1.
Signed-off-by: Praveen Hp <praveen.hodagatta.pranesh@intel.com>
CsmePciReadBuffer function prototype is alligned as
per the CSME fwupdate lib. It fixes issue with
CSME capsule fw update.
Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
It was reported that some platform had MP waking up issue after
switching to using X2APIC library. By comparing the library, found
X2APIC removed 2nd IPI sending in the flow. This 2nd IPI is
required per IA specification. The patch added it back.
Tests have been done and confirmed it fixed the issues seen on
thos platforms.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch added X2APIC support. It is to enable the case when
APIC ID is greater than 255. This patch only handle core wakeup
portion. Platform still needs to handle ACPI related changes for
X2APIC.
X2APIC lib is backward compatible with XAPIC lib. So there is no
need to use XAPIC lib anymore.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
The ApDataPtr->CProcedure was wrongly updated in previous patch.
This patch fixed it and CPU task name from CProcedure to TaskFunc
to avoid confusion.
Signed-off-by: Guo Dong <guo.dong@intel.com>
This patch fixed a failure in firmware update that
occur during SBL version check. Current code assume
that the SBL layout does not change between the existing
firmware and the capsule, when the layout change, stage1A
address change and this is causing error while obtaining
the firmware version.
Code is modified to use the last 4 bytes of the SBL region
which contain Stage1A FV address and this is used to obtain
the version information.
Signed-off-by: Raghava <raghava.gudla@intel.com>
Point TGL project to use common GpioLib and fix build errors.
GpioPlatformLib instance for TGL platform is also provided
as a reference for other platforms. Also remove TGL specific
Gpio Library related files.
Usage:
To configure Gpio pins provided by GPIO CFG DATA:
ConfigureGpio(Gpio_Cfg_Data_Tag, 0, NULL);
To configure Gpio pins provided by GPIO_INIT_CONFIG array:
ConfigureGpio(0, Num_entries, Ptr_to_Array);
Signed-off-by: Talamudupula <stalamudupula@gmail.com>
This patch fixed a failure occured during CSME firmware
update. CSME firmware update library expects PCI read buffer
with a specific format, there is mismatch with input and output
parameter with the current code. Added a wrapper function
with the expected format to fix the failure.
Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
This will fix invalid PDP/PDE generation with PAE 2MB Pages,
and high bit calculation at PayloadEntry additionally.
Signed-off-by: Aiden Park <aiden.park@intel.com>
In 32 bit SBL, when PCI PMEM64 exists, the OsLoader will hang
during boot in CreateIdentityMappingPageTables(). The function
is inteneded to be used in X64 mode only, and cannot handle
32bit well. So OsLoader should not call it for 32 bit build.
This patch also zeroed the allcated memory to ensure the unused
entries are all 0.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Current Execute32BitCode() passes in 64bit arguments into stack.
It should use 32bit arguments instead according to 32bit calling
convention. This patch fixed this issue.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
SBL support to load PreOS and normal OS in a single boot option.
This patch tries to standardize the PreOS support.
The PreOS could be TrustyOS, PreOsChecker or others.
As long as PreOS flag is set in boot option, SBL will load and
boot PreOS before normal OS. If the preOS has specific requirement,
it could be addressed using PreOS image type.
Signed-off-by: Guo Dong <guo.dong@intel.com>
BGRT can be used by bootloader to pass logo to OS. But BGRT can
only support 24bit or 32bit BMP format. If the bootloader uses
other bit format or indexed color format, the image has to be
converted before passing it to BGRT. This patch added support
to convert other BMP image format into 32bit format required by
BGRT.
This has been tested with Windows on Leafhill board. The SBL
logo was dispalyed properly while booting Windows.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
As per TCG spec, if a Tpm2Startup(TPM_SU_STATE) fails during
S3 resume, a host reset should be done.
When BootGuard is enabled, ACM will notify of this failure via Bit46 in
BootGuardBootStatus register.
Signed-off-by: Sachin Agrawal <sachin.agrawal@intel.com>
This introduces a new PCD 'PcdPciResAllocTableBase' to allow a platform
to provide its specific PCI resource allocation pool at runtime.
PCI Enumerator will allocate required resources in the range.
If the PCD is not provided, a default range will be used.
Signed-off-by: Aiden Park <aiden.park@intel.com>
Since the EXT library we have in OS Loader
supports 2, 3, and 4 it will help to reduce
confusion for users who have noticed that
only 2 and 3 are currently printed.
Signed-off-by: James Gutbub <james.gutbub@intel.com>
This patch enabled ACPI BGRT support. It is used to pass splash
display information from bootloader to payload and OS.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
For UEFI Linux boot, a new parameter was added into BOOT_PARAMS.
This patch added this parameter support so that ACPI base can
be passed directly to kernel.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Since SBL could be built into either x86 or x64 mode, and the payload
can also be x86 or x64 mode. When mixed modes are used, it is required
to switch to proper mode first before calling into payload entrypoint.
This patch added this check to switch to required mode before calling
into payload entry point.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch expanded HECI service to include send, receive and
reset interface functions. This helps in making firmwareupdatelib.c
and PSDlib common across platforms.
Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
During X64 enabling, there was a pending task to enable 32bit
MultiBoot support. It is not implemented. This patch added the
support to allow X64 SBL to boot a 32bit MB image through thunking.
As part of this patch, the ThunkLib is separated from the FspApiLib
so that it can be shared by other component.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Currently SBL library has GetDeviceAddr() to get the device
address based on device type and instance. This patch adds
SetDeviceAddr() to update a given device type and address so
that platform could update the device table dynamically.
Signed-off-by: Guo Dong <guo.dong@intel.com>
This patch fixed GCC x64 Crypto boot issue. The issue was related
to the calling convention. "EFIAPI" was missing for several ASM
provided functions.
It also fixed#834.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch added SBL python setup script. It can run on either host
or target MicroPython environment. A new PCD PcdEnableSetup is added
to control if Setup feature should be supported by core.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch added restricted boot flag support. When restricted boot
flag is set, the OsLoader will only try the current boot option
selected without falling through all other boot options. Also it will
not allow to get into Shell. This is for the usage to run some
critical applications such as bootloader Setup.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
A device in boot options can have a BAR greater than 4GB depending on PCI
64Mem/PMem resource policy.
This will allow Payload to build a paging table to cover high MMIO area.
Signed-off-by: Aiden Park <aiden.park@intel.com>
The boot command currently does not allow you
to enter the BootFlags value which is needed
for some boot images.
Also fix a small issue in the FsType selection
code block.
Signed-off-by: James Gutbub <james.gutbub@intel.com>
This patch added new DrawFrameBuffer interface. It will draw the
framebuffer from a VGA like text buffer. Payload can use this
to sync its own text buffer onto framebuffer screen. It aslo added
extend ASCII char support so that some table char can be displayed.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch added new function to build a full set of the CFGDATA set
from the memory for current platform. It is useful for exporting
current platform CFGDATA for further processing.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch added an example on how to build a HelloWorld payload
from separate DSC file.
To build a standalone HelloWorld payload, use the following command:
BuildLoader.py build_dsc -p PayloadPkg\PayloadPkg.dsc
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Linux framebuffer screen_info has been extended to support 64bit
address. This patch added extra fields and set the upper 32 bit
for the framebuffer base.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch added the missing general configuration settings for
QEMU platform. It also addressed a build issue due to non-ascii
chars in the IPP file.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch aligns IPP crypto repo sources and headers,
- Update license headers as per IPP crypto
- Naming convention updates
- Partial clean up.
ASM updates will be addressed in next patches.
Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
This patch moved GetHashToExtend function from BootloaderCommonLib
to SecureBootLib. It is a better place to contain this interface.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Add support for security version check for
config data blob update. SVN is checked
for redundant region which would be updated.
Fixed python errors in CfgDataTool and
GenCapsuleFirmware.
Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
When a SATA controller has no Ports Implemented
behind it, AHCI mode init returns error even before
allocating buffers for RFis, CommandTable, CommandList.
So, AHCI de-init expects them to be NULL, else any
garbage value for these fields forces the code to do
a FreePool on non-allocated memory.
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
Capsule Command support added for anti rollback
security version number. User can create command
in text file and create capsule with CMDI mode.
{ARBSVNCOMMIT}
Platform APIs would be invoked to do SVN
commit operations by useing HECI interfaces.
Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
LocateComponentEntry is modified to locate only container
entry. Additional checks are required at consumer end
for Container entry and CompEntry.
Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
The current MulitBoot loading code in SBL did not follow the specification.
The spec stated "The offset in the OS image file at which to start loading
is defined by the offset at which the header was found, minus
(header_addr - load_addr)". However, the current code always copies from
offset 0 of the image file. It caused exception when loading some valid
multiboot image.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Add support for security version check for
container and its components with ones available
in flash for capsule updates.
Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
Add svn field to container generation. SVN need
to be verified while doing container capsule
update. svn is added as end parameter to layout.
Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
The 'fs' shell command initializes media device with media type info,
but it's not able to initialize another controller of same media type.
Therefore, 'fs init' accepts device instance number.
ex) SATA(0), SATA device instance 1, hwpart 2, swpart 3
fs init 0:1 2 3
Signed-off-by: Aiden Park <aiden.park@intel.com>
This patch converted key hash store in SBL image into container
format. In this way unified data structure can be used to
simplify code.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
The unnecessary wbinvd() is removed from the common ResetSystemLib,
and it moves to a platform specific reset routine.
Signed-off-by: Aiden Park <aiden.park@intel.com>
SPI driver is updated to support read linux from
BIOS and PDR region, When boot device SPI is
selected.
Signed-off-by: Mutha <naga.naveen.mutha@intel.com>
This patch fixed OsLoader boot from SD card issue on Intel APL CRB
borads. The SD/eMMC library was updated to follow the proper sequence
for SD card. Also platform code was updated to detect SD card and
apply SD card power using proper GPIO pins.
It fixed#729.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
IA32 UEFI payload uses PE format and X64 UEFI payload uses
PE+ format. So update LitePeCofflib to support both PE and
PE+.
Signed-off-by: Guo Dong <guo.dong@intel.com>
This will fix an unexpected exception when AhciHcPciBase is invalid
or the PCI config space is not enabled.
Signed-off-by: Aiden Park <aiden.park@intel.com>
Current SBL supports container header verification. If the container
signature is BOOT, it will use HASH_USAGE_PUBKEY_OS. Otherwise, it
will use HASH_USAGE_PUBKEY_CONTAINER_DEF. This patch added OEM signed
container support. If a container signature between OEM0 to OEM7 is
found, it will be verified use HASH_USAGE_PUBKEY_OEM(x) where x is 0
to 7. To add an OEM public key hash, it can be done by updating
pub_key_list in GetKeyHashList() in file BoardConfig.py.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch adds generic functionality to
process Flash descriptor lock. It follows
Capsule Firmware update flow and interface
is updated. Command (CMDI) interface is added
to GenCapsuleFirmware which takes file with
command as input.
Sample Command format in text file input,
{FLASHDESCLOCK}
{Command2}
{Command3}
Firmware update lib handler parses high level commands
Specific command process and functionlity would be
performed by platform specific libraries.
Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
Klocwork reports a potential dereferencing of a NULL
pointer. This patch addresses the issue.
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
Platform debug mode is extended to PCR[7]
as part of secure boot policy. Updated bit setting
to LoaderPlatformInfo for payloads to consume.
Debug mode is checked in payload.
ArchitecturalMsr.h ported fom EDK2 repo.
Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
This will allow necessary messages to be printed to consoles.
These macros will redirect debug message to consoles.
CONSOLE_PRINT
CONSOLE_PRINT_UNICODE
These conditional macros will redirect debug message to consoles or
DEBUG(). The PrintLevel is valid only when redirected to DEBUG().
CONSOLE_PRINT_CONDITION
CONSOLE_PRINT_UNICODE_CONDITION
Signed-off-by: Aiden Park <aiden.park@intel.com>
To help debug boot performance, add a MTRR print function.
This function could be invoked multiple times with different
string to know where this MTRR data is printed.
Signed-off-by: Guo Dong <guo.dong@intel.com>
This patch enhances MapMemoryRegion subroutine to
add PDP entries for mapping addresses > 4GiB.
Only 1:1 mapping is provided for Above4Gb addresses.
And linear addresses are mapped to 1GiB pages.
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
This issue is seen on a WHL board on X64 build when high 32-bit
BAR does not exist. In that case, MmioRead64 returns (UINT64)(-1).
To avoid this, read high 32-bit BAR only if BAR type is 64-bit
address space.
Signed-off-by: Aiden Park <aiden.park@intel.com>
Current container library cannot be used before memory is initialized
because the structure will only be initialized after memory. This
patch moved the initialization into Stage1A so that the library can be
used much earlier. The containers registered before memory will be
migrated into memory automatically post memory initialization. In this
way it avoids duplicated header authentication.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This will load and execute 64-bit ELF image.
- Load image from ELF program header
- 32-bit ELF on IA32 only. 64-bit ELF on X64 only
- TBD: Relocate ELF
Signed-off-by: Aiden Park <aiden.park@intel.com>
Jan Schlosser