This patch fixed the misleading partitioin detection error message.
It should be file system detection error message instead.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch cleaned up the NVMe library DEBUG message. Lots of the
DEBUG_INFO level were changed to DEBUG_VERBOSE to reduce normal
output.
It also removed the hardcoded device index 0 for NvmeReadBlocks,
NvmeWriteBlocks and NvmeGetMediaInfo APIs.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Current NVMe library reports hardcoded block size 512 and block num
512. It is incorrect. This patch fixed it.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Make PchPcrLib common. Remove redundant headers
not used by some platforms and link the new common
lib with the platforms currently using it.
Signed-off-by: Sai T <sai.kiran.talamudupula@intel.com>
This patch enhanced the FWU code flow:
- Moved the capsule signature save to later flow because current
code saved it too early and later on the state block will be
erased.
- Enhanced error handling. If there is error during FWU, both the
state machine and the trigger need to be cleared. Otherwise, it
will be in infinite loop.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Removal of disabling AcSplitLock FSP UPD.
The FSP UPD is commented out due to the Yocto hang
issue previously which no longer occured.
Signed-off-by: Ong Kok Tong <kok.tong.ong@intel.com>
On TGL warm reset flow, current MRC will always do full MRC training.
It is because of wrong PMC rigster was used in platform code to set
and clear the MRC scratch pad bit.
This fixed#1346.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Ubuntu 20.04.3 can support TGL platform. However, current SBL won't
be able to boot without changes. It is caused by following issues:
- GRUB CFG support is not enabled by default
- Payload heap is too small to load the full INITRD image
- USB boot option is set to boot from partition 1 and EXT2 filesystem.
This patch addressed above issues. It has been tested on UPX i11.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Current XHCI library does a big loop to poll the status of a
USB command execution. In each loop it will delay 1us until
it completes or reachs the timeout. When the loop is very big,
the accumulated 1us delay together will be shifted far beyond
the original timeout requested. This is because of the inaccuracy
of the 1us delay provided by ACPI timer library. This patch
addressed this issue by checking the actual executed time rather
than looping with delay.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch fixed the USB enumeration long delay issue seen on
UPX i11 board. It disabled the malfunction USB port 8.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Since the commit below was reverted
24f5aa59b5. The cache flush
need to be moved into the place where data consistency
across warm reset is required. The patch added the WBINVD
to flush the cache before "fwupdate" command issues warm
reset.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This reverts commit 24f5aa59b5.
There are cases that warm reset is requested before memory is
initialized. Doing WBINVD in this case can cause system hang.
A better approach is to let the caller to decide when to do
cache flush for a warm reset.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Sometimes it is helpful if SBL can support firmware update from
SBL FW to UEFI FW, or update from incompatible SBL flash layout.
This will need SBL to write full BIOS region without using
redundant partition. To support this, a special capsule image
flag is added to indicate this special update. Please note, this
update might be very risky. This is only for development purpose.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
In some cases, the memory needs to keep consistent across a warm
reset. When warm reset is triggered, it might still have modified
cacheline that has not been flushed to memory yet. The patch added
WBINVD to flush cache before the warm reset.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
On UPX, one USB2 port does not respond properly during PCI enumeration.
It needs to be disabled. The current SBL code disabled the wrong port.
It should be port 10 (USB2 index 9).
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
The current SBL IfwiUtility script assumes the SBL image size
occupies the full BIOS region. However, in some case, gap may
exist at the beginning of the BIOS region. SBL image will not
always start at BIOS region offset 0. This patch added special
handling to support this case.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
In the TGL implementation of UpdateFspConfig() in Stage1BBoardInitLib.c,
there are two missing UPD updates that have been validated for TGLH. This
manifested itself when enabling the TCC feature by setting ENABLE_TCC in
BoardConfig.py by reporting a bad VT-d descriptor and hanging.
This patch incorporates these two UPD settings for the TGLH boards.
Signed-off-by: Jim A. Pelner <jim.pelner@intel.com>
During UP Extreme board enabling, trace hub interface was enabled
to help debug. But it should be disabled by default. This patch
fixed it.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
On TGL UpdateFspConfig() funciton in Stage2BoardInitLib.c has code
path to return early, it will skip all remaining UPD initialization.
The code should always continue the flow to finish the whole
function. This patch fixed this issue.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
CSMD (CSME update driver) is a part of FwuImage.bin capsule,
and it updates the CSME binary on SPI Flash. ApplyFwImage call
cant be invoked for CSMD component.
Signed-off-by: Sai T <stalamudupula@gmail.com>
KW scan reported a couple errors regarding
Sec*Shdr value, need to check if they are
NULL before using these values.
Signed-off-by: James Gutbub <james.gutbub@intel.com>
1. HD Audio and TSN share pins. These are mutually exclusive features.
2. RVP board should be reworked to support legacy HD Audio mode.
Signed-off-by: Randy Lin <randy.lin@intel.com>
Seems some recent patches may have added additional
size to OS Loader and now the internal pre-commit build
test in Jenkins is failing due to not enough space
for PAYLOAD. Other platforms are also using 29000h
so might be best to increase the CFL value as well.
Signed-off-by: James Gutbub <james.gutbub@intel.com>
Current SBL code uses MSR(0xce) to calculate the CPU TSC frequency.
However, it is not very accurate. A better way is to use CPUID to
calculate the TSC frequency. This patch added new API to get accurate
TSC frequency. It also added APIs to allow conversion between time
and TSC ticks.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Current SBL build will show lots of FSP files as untracked files.
This patch re-orgnized the rules for .gitignore file so that it
has better control at different folder level. With these new rules
no untracked files will be shown for the FSP and VBT files.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
On SBL, it can support boot option selection through QEMU command line
"-boot order" parameter. However, it does not work anymore. It was
because of the MAX_BOOT_OPTION_CFGDATA_ENTRY adjustment in other commit.
This patch decoupled internal boot option index with the CFGDATA boot
option index so that it does not have impacts on each other. With this
change, QEMU boot option can be altered through command line again.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
The newly added code caused build issue for EHL and CMLv x64 due to
insuffiant flash space. This patch adjusted the flash layout to fix
the build failure.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch enabled ELF UEFI Universal Payload boot for SBL. It was
tested with EDK2 commit 22873f58c40c496d59a0553bee1c720192ac35c9.
To build UEFI Universal Payload, please run script from EDK2 repo:
edksetup.bat
python UefiPayloadPkg\UniversalPayloadBuild.py -b DEBUG -t VS2019
The generated payload binary will be located at:
Build\UefiPayloadPkgX64\UniversalPayload.elf
This patch was tested on QEMU, and it worked as expected.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Universal Payload uses ELF format. As a result, the ELF loading
library has been enhanced to handle more complicated cases. The
Universal Payload library added an abstract layer on top of
ELF lib to make it easer to use by SBL. OsLoader and Stage2 were
modified to work with the new library interfaces.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch clears RTC alarm when RTC is the S3 wake-up source.
Without clearing it, SMI# will be triggered once SMI_EN is set
by RestoreS3RegInfo, but no handler to clear it which results
in hang.
In addition to clearing RTC SMI#, this patch also clears other
SMI# as UEFI BIOS does.
Test method: rtcwake -m -s 15
Signed-off-by: Stanley Chang <stanley.chang@intel.com>
Latest EDK2 code added support to consume universal PCI root
bridge info HOB. In order to pair with the latest UEFI payload
on EDK2, SBL needs produce the required root bridge info HOB.
This patch added this support.
It was tested on QEMU with latest UEFI payload.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Current Stage2Support.c contains lots of HOB related code. Since
more universal payload related HOBs will be added, it makes more
sense to split the HOB related code into a separate file. It is
easier to maintain.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
In some cases the paging will be enabled after returning from the
thunked function. To ensure the paging table can be reloaded before
switching back to x64 mode, the paging needs to be in disabled
state. This patch ensures the CR0 bit31 paging bit is cleared.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
- UP3 IoT FSP MR3
- change the FSP headers from FspBin folder to Include folder
- update TGL platform version to 1.3
Signed-off-by: Vincent Chen <vincent.chen@intel.com>
SBL defined SetDeviceAddr/GetDeviceAddr to abstract platform
device info. However, currently only boot media devices are
defined. It has cases that other platform device info is needed,
such as GFX device. This patch extended the concept to define
some other platform devices as an extenstion to
OS_BOOT_MEDIUM_TYPE. The enum values should not overlap with
the ones defined in OS_BOOT_MEDIUM_TYPE.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Disable the new GPIO scheme by default in dlt file
Only enable this option for kernel version 4.18.0-315
Alternatively with kernel module parameter
'module_blacklist=pinctrl_elkhartlake' will works
without enabling this GPIO scheme.
Signed-off-by: Ong Kok Tong <kok.tong.ong@intel.com>
Synced the PrintBootOptions fucntions to print
Pre-OS and extra images.
Fixed bug -> if pre-os or extra images are not enabled
in boot flag and it still output in PrintBootOptions
function
Signed-off-by: Ong Kok Tong <kok.tong.ong@intel.com>
Currently the PLT_DEVICE_TABLE is limited
to only using OS_BOOT_MEDIUM_TYPE devices
but ideally should be capable of mapping
any system device into the table. For the
time being we will remove the OsBootDeviceGraphics
since it created some KW issue in the fs command.
Signed-off-by: James Gutbub <james.gutbub@intel.com>
Current CFGDATA item can only be displayed under one single page
defined in YAML. In some special case it might need to duplicate
the same item under a differnt page. This patch added this feature
by introducing a new "altpage" attribute for a CFG item. When a
item needs to be displayed on a 2nd page, 'altpage' can be added
to indicate the 2nd page id.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Current PciBus lib expects the root bridge resource base should not be
greater than limit. It is true for normal case. However, to mark the
source is unavailable, the base could be less than the limit in some
case. PCI bus lib should only validate the resource that does have a
request.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
On QEMU or Smimics, it might need to do native GFX initialization
if the GFX is not initialized by FSP. This patch added the native
GFX support for BOCHS graphics controller.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
On Simics or QEMU, BOCHS graphics is used. This patch provides
library to initialize BOCHS graphics. It is useful when GFX
initiailzation is not provided by FSP. In this case, the native
code can be used to initialize graphics.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch upstreams previous CML patch for RC3 hotfix:
[CMLV] Fix chipsec SMM issues in S3 path:
Trigger SMI in S3 path to let UEFI payload restore registers.
Signed-off-by: Stanley Chang <stanley.chang@intel.com>
Maurice Ma