Clear the RTC EN SCI flag to avoid interrupt storming
that cause system hang when using rtcwake method to perform
powre management test
Signed-off-by: Ong Kok Tong <kok.tong.ong@intel.com>
Signed-off-by: Ong Kok Tong <kok.tong.ong@intel.com>
- FSP version - 0C.00.69.74
- Vbt version - 1077
- Microcode version - m_07_90672_00000023
- Minor version updated to '2' for MR2.
Signed-off-by: Sindhura Grandhi <sindhura.grandhi@intel.com>
- Increase PlatformMemorySize to get rid of FSP error caused
during Tcc SRAM init.
- Sort the CPUs in ascending order for Tcc validation purpose.
Signed-off-by: Sindhura Grandhi <sindhura.grandhi@intel.com>
This change creates TCO timer APIs
for initialization, starting,
stopping, and setting timeout
This change removes TCO timer APIs
for disabling and enabling
Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
Use the GPIO table from SBL config data instead of
the one from .h file. the .h file will keep there
a while just for reference.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Use a on board switch (Pin B3) as the GPIO to switch
UEFI payload and OsLoader. So update its setting as
GPIO IN for this purpose.
Signed-off-by: Guo Dong <guo.dong@intel.com>
For PAD name (e.g., GPD12), current GpioDataConvert.py get the
pad number using pad_name[4:6]. It should be changed to pad_name[3:5].
Signed-off-by: Guo Dong <guo.dong@intel.com>
Current PlatformNvs parameters are causing the power management
(S3, S4 and S5) in Windows OS. Removing the Nvs parameters will fixed
the issues.
Signed-off-by: Ong Kok Tong <kok.tong.ong@intel.com>
The HPET timer address is wrong at first time invoke.
Assign to fixed value directly.
Verified on EHL TGLU.
Signed-off-by: Randy Lin <randy.lin@intel.com>
Restore SMM registers was done in the PostPciEnumeration.
so remove the duplicated code in EndOfStages
and call ClearS3SaveRegion() in normal path to avoid
appending multiple restore records.
Signed-off-by: Guo Dong <guo.dong@intel.com>
New shell command 'usbdev' added to enumerate USB bus and list down
all the USB devices that are found on the bus.
Signed-off-by: Biswas Arghya <arghya.biswas@intel.com>
Signed-off-by: Sachin Kamat <sachin.kamat@intel.com>
FSP-S UPD format for THC port assignment was updated, but PEP logic
was using the old format, and causing the PEP constraint to always be
enabled. This issue didn't seem to be causing a problem, but resulted
in noncompliant low power idle constraints.
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
This Patch fix the build issues due to the increased payload and image size
in windows and linux environment.
- Fixed PAYLOAD size greater than padding size issue for CML.
- Fixed FWUPDATE size greater than padding size issue for EHL.
- Fixed FV image size issue for CMLV,TGL,EHL and ADLS.
Signed-off-by: Aakash Panwar <aakash.panwar@intel.com>
This Patch adds the support for UFS(Universal Flash Storage)
as a boot media.
- Added support to Enable all Lun's for UFS
- Added support to change power modes in UFS
- Enable Bus master for proper PCI addressing
Signed-off-by: Aakash Panwar <aakash.panwar@intel.com>
Signed-off-by: Sachin Kamat <sachin.kamat@intel.com>
Signed-off-by: Chirag Vijay Kolhe <chirag.vijay.kolhe@intel.com>
Signed-off-by: Aakash Panwar <aakash.panwar@intel.com>
- If BIOS update is followed by any payload,
reboot to ensure the update is completed.
- Before processing CMDI payload, ensure CSME update has
taken effect to prevent {OEMKEYREVOCATION} command failure.
Signed-off-by: Vincent Chen <vincent.chen@intel.com>
This patch will let ADLP project to build and stitch images from
open source.
TEST = Smoke-test to boot to Windows/Yocto
Signed-off-by: Sindhura Grandhi <sindhura.grandhi@intel.com>
Previous setting of SW-first CM mode was causing a hang during S3/S4 entry. Likely this setting requires additional ACPI/driver support which is missing.
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
Remove OS version check in PEPD _STA method. This is a change to the intelpep.sys ASL device (PEPD) for low power idle support. Previously, _STA would always return present/enabled for Win10 even if S0ix config flag was disabled. Changed version always returns status based on S0ix flag. Without this workaround, S4 resume was failing on ADL-N/P/PS.
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
This change adds a board configuration flag to turn
this flash layout change off and on
This change eliminates FSP rebasing in SG1B when this
flash layout change occurs as the addressing is
different in TS region
Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
Use the GPIO table for the test boards.
This change would help fix PCIe device detection from PCIe slot.
Late would change post memory gpio table to SBL cfg data.
Signed-off-by: Guo Dong <guo.dong@intel.com>
- skip the component replacemnt if the component is not located in SBL image
- print the skipped replacement components
- indicate failure through exit status for easily diagnosing problems
when checking stitch config parameters
- add required flash image region 5=EC for new FIT (15.40.26.2632)
- remove 'sata' stitch option since it is no function
Signed-off-by: Vincent Chen <vincent.chen@intel.com>
acpica-tools needed to be updated from 20190509-6 to 20190509-7 due to
package availability but the newer tool depends on a newer libc that is
not present in Ubuntu 18.04.
Update Ubuntu instead to fix both issues since Ubuntu now has acpica-tools
included in its repositories
Signed-off-by: Atharva Lele <atharva.lele@intel.com>
- Process Gpio Cfg data from the dlt file instead of the hard-coded
GPIO table.
- The table in the PostMem hdr file is only for reference.
Signed-off-by: Sindhura Grandhi <sindhura.grandhi@intel.com>
The patch adds support of "GPD" group when parsing a .h header file.
It also
- adds supports for Pch-N,
- fixes leading whitespaces in h file.
Test commands:
# h to dlt
$ python Platform/CommonBoardPkg/Tools/GpioDataConvert.py \
-cf Platform/AlderlakeBoardPkg/Script/GpioDataConfig.py \
-if example_adls.h -of dlt -p s \
-o out_adls.dlt
# h to yaml
$ python Platform/CommonBoardPkg/Tools/GpioDataConvert.py \
-cf Platform/AlderlakeBoardPkg/Script/GpioDataConfig.py \
-if example_adls.h -of yaml -p s \
-o out_adls.yaml
# yaml to h
$ python Platform/CommonBoardPkg/Tools/GpioDataConvert.py \
-cf Platform/AlderlakeBoardPkg/Script/GpioDataConfig.py \
-if out_adls.yaml -of h -p s \
-o out_h_from_yaml.h
# dlt to h
$ python Platform/CommonBoardPkg/Tools/GpioDataConvert.py \
-cf Platform/AlderlakeBoardPkg/Script/GpioDataConfig.py \
-if out_adls.yaml -of h -p s \
-o out_h_from_dlt.h
# check: compare example_adls.h and out_h_from_dlt.h
# yaml to txt
$ python Platform/CommonBoardPkg/Tools/GpioDataConvert.py \
-cf Platform/AlderlakeBoardPkg/Script/GpioDataConfig.py \
-if out_adls.yaml -of txt -p s \
-o out_txt_from_yaml.txt
# dlt to txt
$ python Platform/CommonBoardPkg/Tools/GpioDataConvert.py \
-cf Platform/AlderlakeBoardPkg/Script/GpioDataConfig.py \
-if out_adls.dlt -of txt -p s \
-o out_txt_from_dlt.txt
Signed-off-by: Stanley Chang <stanley.chang@intel.com>
The steps of OEM key revocation are:
1. Replace OEM KM (signed with key2) by updating CSME
2. Replace BIOS region (signed with key2)
3. Reboot with new BIOS region (to make key1 inactive)
4. Revoke key1
Before this patch, it requires 2 firmware updates and 2 capsules for
step 1~2 and step 4 respectively. The patch combines them into a single
update/capsule.
To implement the feature, the patch:
1. Double max # of payloads to allow CSME/CSMD/BIOS/CMDI update
in one capsule image.
2. Prevent from failing update of a critical component.
e.g., if step 1(CSME) fails, step 2(BIOS) should be skipped
Verified cases:
Case 1: Capsule having CSMD/CSMD/BIOS/CMDI.
Expectation: successful
$ python BootloaderCorePkg/Tools/GenCapsuleFirmware.py \
-p CSME FWUpdate.bin \
-p CSMD CsmeUpdateDriver.efi \
-p BIOS new_BiosRegion.bin \
-p CMDI cmdi.txt \
...(skip)
Case 2: Capsule having CSME/BIOS/CMDI but no CSMD.
Expectation: no update
Case 3: Inject fault flow (no partition switch after first flash),
Capsule having CSME/CSMD/BIOS/CMDI.
Expectation: no CMDI update
Verification: EHL CRB
Signed-off-by: Stanley Chang <stanley.chang@intel.com>
- update FSP version to MR4 FSP (09.04.25.11)
- update VBT version to MR4 FSP (244)
- update microcode version to 16
- update EHL platform version to 1.4
Signed-off-by: Vincent Chen <vincent.chen@intel.com>
This patch is to support OEM root key revocation feature.
When the firmware update is done processing CSME payload
containing OEM KM with revocation extension, the system
needs to reset for the changes to take effect. Otherwise,
the following CMDI {OEMKEYREVOCATION} command will fail.
Signed-off-by: Vincent Chen <vincent.chen@intel.com>
When firmware update is processing BIOS payload, it will
locate Stage1A FV and get SBL version file for verification.
The files in FV are expected to be located at 8-byte aligned
offset. There is chance to break the alignment when a payload
of variable size, e.g. CMDI file, is packed in front of BIOS
payload. So this patch adjusts the starting offset of BIOS
payload to be 8-byte aligned with 0xFF paddings.
Signed-off-by: Vincent Chen <vincent.chen@intel.com>
EHL DMA controllers are hidden at PSF level in reference code,
DMA controllers are reported as ACPI devices if ownership is Host.
So should not check DMA PCI header for DSDT table patching.
Update the change follow EHL reference code.
Signed-off-by: Gavin Xue <gavin.xue@intel.com>
When some settings from DSO caused system hang,
the WDT would cause the system reboot.
And in the next boot, SBL would use the default
setting by not apply the DSO values.
Verify on EHL CRB.
Signed-off-by: Aiman Rosli <muhammad.aiman.rosli@intel.com>
In A/B update, after FWU updates partition B, it switches to and boots
with partition B. If boot fails because of anything wrong with the update,
CSME will switch back to booting with partition A.
Before this patch, unfortunately, the EnforceFwUpdatePolicy will
immediately try to boot again with partition B, which results in
an infinite FWU loop:
try B -> failed -> boot A -> try B -> failed ...
(Same for initial with "try A -> failed" scheme.)
This patch adds a retry count field in FW_UPDATE_STATUS.
Using retry count field to determine if retry also reaches a
max times. If so, stop the loop.
To simplify the implementation for SPI, the retry count field is
implemented as continuous 1 (ONE) of a bit array.
Test scenarios:
Case 1. update bios region. Expectation: PASS
Case 2. update non-bios region. Expectation: PASS
Case 3. Inject fault flow (no partition switch after first flash),
and update bios region. Expectation: Stop retry after few times.
Verify: EHL RVP
Signed-off-by: Stanley Chang <stanley.chang@intel.com>
The patch fixes potential infinite FWU loop if InitFirmwareUpdate fails.
An infinite FWU loop occurs when (Count != MAX_FW_COMPONENTS). Thus,
without this patch, it increases the error-handling complexity in
InitFirmwareUpdate in the future (i.e., all early-return/abort cases must
take care of FW_UPDATE_SM_DONE by themselves).
The fixes simplfes the end firmware update by:
1. set SM as FW_UPDATE_SM_DONE at EndFirmwareUpdate
2. move reboot to EndFirmwareUpdate
Verified: EHL CRB
Signed-off-by: Stanley Chang <stanley.chang@intel.com>
M Karuppasamy