This patch converted key hash store in SBL image into container
format. In this way unified data structure can be used to
simplify code.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
The unnecessary wbinvd() is removed from the common ResetSystemLib,
and it moves to a platform specific reset routine.
Signed-off-by: Aiden Park <aiden.park@intel.com>
SPI driver is updated to support read linux from
BIOS and PDR region, When boot device SPI is
selected.
Signed-off-by: Mutha <naga.naveen.mutha@intel.com>
This patch fixed OsLoader boot from SD card issue on Intel APL CRB
borads. The SD/eMMC library was updated to follow the proper sequence
for SD card. Also platform code was updated to detect SD card and
apply SD card power using proper GPIO pins.
It fixed#729.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
IA32 UEFI payload uses PE format and X64 UEFI payload uses
PE+ format. So update LitePeCofflib to support both PE and
PE+.
Signed-off-by: Guo Dong <guo.dong@intel.com>
This will fix an unexpected exception when AhciHcPciBase is invalid
or the PCI config space is not enabled.
Signed-off-by: Aiden Park <aiden.park@intel.com>
Current SBL supports container header verification. If the container
signature is BOOT, it will use HASH_USAGE_PUBKEY_OS. Otherwise, it
will use HASH_USAGE_PUBKEY_CONTAINER_DEF. This patch added OEM signed
container support. If a container signature between OEM0 to OEM7 is
found, it will be verified use HASH_USAGE_PUBKEY_OEM(x) where x is 0
to 7. To add an OEM public key hash, it can be done by updating
pub_key_list in GetKeyHashList() in file BoardConfig.py.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch adds generic functionality to
process Flash descriptor lock. It follows
Capsule Firmware update flow and interface
is updated. Command (CMDI) interface is added
to GenCapsuleFirmware which takes file with
command as input.
Sample Command format in text file input,
{FLASHDESCLOCK}
{Command2}
{Command3}
Firmware update lib handler parses high level commands
Specific command process and functionlity would be
performed by platform specific libraries.
Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
Klocwork reports a potential dereferencing of a NULL
pointer. This patch addresses the issue.
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
Platform debug mode is extended to PCR[7]
as part of secure boot policy. Updated bit setting
to LoaderPlatformInfo for payloads to consume.
Debug mode is checked in payload.
ArchitecturalMsr.h ported fom EDK2 repo.
Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
This will allow necessary messages to be printed to consoles.
These macros will redirect debug message to consoles.
CONSOLE_PRINT
CONSOLE_PRINT_UNICODE
These conditional macros will redirect debug message to consoles or
DEBUG(). The PrintLevel is valid only when redirected to DEBUG().
CONSOLE_PRINT_CONDITION
CONSOLE_PRINT_UNICODE_CONDITION
Signed-off-by: Aiden Park <aiden.park@intel.com>
To help debug boot performance, add a MTRR print function.
This function could be invoked multiple times with different
string to know where this MTRR data is printed.
Signed-off-by: Guo Dong <guo.dong@intel.com>
This patch enhances MapMemoryRegion subroutine to
add PDP entries for mapping addresses > 4GiB.
Only 1:1 mapping is provided for Above4Gb addresses.
And linear addresses are mapped to 1GiB pages.
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
This issue is seen on a WHL board on X64 build when high 32-bit
BAR does not exist. In that case, MmioRead64 returns (UINT64)(-1).
To avoid this, read high 32-bit BAR only if BAR type is 64-bit
address space.
Signed-off-by: Aiden Park <aiden.park@intel.com>
Current container library cannot be used before memory is initialized
because the structure will only be initialized after memory. This
patch moved the initialization into Stage1A so that the library can be
used much earlier. The containers registered before memory will be
migrated into memory automatically post memory initialization. In this
way it avoids duplicated header authentication.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This will load and execute 64-bit ELF image.
- Load image from ELF program header
- 32-bit ELF on IA32 only. 64-bit ELF on X64 only
- TBD: Relocate ELF
Signed-off-by: Aiden Park <aiden.park@intel.com>
This patch added support for arrow keys on PS2 numeric keypad.
The original code only supports the dedicated arrow keys.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
In Shell FS after media initialization, the de-initialization
should be called to free all allocated memory.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Recent Linux kernel accepts acpi_rsdp=0x.. in kernel command line.
This will make Linux kernel look for ACPI RSDP address in the kernel
commad line first prior to in DMI or F-segment.
Signed-off-by: Aiden Park <aiden.park@intel.com>
FSP could produce a FSP boot performance HOB.
So add the capability to print FSP performance data.
Also add a PcdBootPerformanceMask to enable/disable
boot performance data print.
Signed-off-by: Guo Dong <guo.dong@intel.com>
This patch upgraded the LZ4 from 1.4.0 to 1.7.4. The size will
increase around 300 bytes. Performance is still very similar.
But when trying to use more recent LZ4 version 1.9, noticed
significant performance degration. So keep to 1.7.4 for now.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
If Platform code assigns 64-bit BAR address to XHCI,
get the full 64-bit address to access MMIO space.
Behavior is undefined if building IA32 and assigning
64-bit XHCI resources.
Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
* Fix XHCI library memory de-allocation issue
This patch added code to XHCI de-initialization funciton to free
all used memory.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
* Enhance USB De-initialization flow
This patch enhanced the USB De-initializaiton flow by trying to
call de-init functions in the full USB driver stack including XHCI,
UsbBus, UsbBot, etc.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch added NVMe de-initialization function to stop the controller
and de-allocate all memory allocated.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch added function UsbDeinitDevice() in UsbBusLib to free
memory allocated for all USB devices.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch added support to report free memory resource lenghth.
It will search for all used memory pages and add them together.
The "virtual" free address will be returned to indicate the
virtual start point of the free memory top. It is virtual since the
memory allocation can be fragmented. This is just an indicator to
calculate the actual used memory size:
UsedMemSize = EndAddr - FreeAddr
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch fixed AHCI memory de-allocation issue by checking the
correct pointer before calling FreePool/FreePages.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
SBL Shell allocated memory during the command registeration phase.
However, these memory is not de-allocated after Shell exits. This
patch added code to de-allocate the memory. It also rearranged the
code a little bit so that function declarations are not required
any more.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Assertion will occur when booting from USB behind hubs. This was
caused by duplicated freeing the same address page. The for loop
in UsbHcFreeMemPool() does not move to next node in the list. The
similar bug exists in UFS driver. This patch fixed both.
It fixed#659.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Added an build config _SIGNING_SCHEME for
selection of signing schmemes. Updated tools
with param for selecting the signing scheme when
they are run in stand alone mode. Authtypes in
container are updated.
Supported Signing schemes - RSA_PCKS_1_5, RSA_PSS
Intel Crypto recommends PSS and same defaulted in
SlimBoot.
Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
This patch adds support for RSA PSS verification.
Ported IPP Crypto for PSS from latest IPP github repo.
Secure boot lib and RSA wrappers functions are
updated. RSA verfication sheme is would be
based on SigType in Signature Header.
PcdCompSignSchemeSupportedMask indicates the signing
scheme included in IPP lib.
Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
This will create a HOB for PCI Root Bridge Resource information.
The PciRootBridgeInfo Hob can be used to update resource ranges of multiple
root bridges in platform PCI tree ASL.
A payload can also use this info to skip duplicated root bridge scan.
Signed-off-by: Aiden Park <aiden.park@intel.com>
In X64 mode, current stage unmapping implementation does not
restore the original identical address mapping. It will cause
issue in some condition. This patch fixed this unmapping issue.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch ported the X64 ASM code from the latest IPP github repo.
All 4 algorithms have been tested.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
* [QEMU] Enable Stage1A boot in X64 mode
This patch added necessary changes to enable QEMU boot through
Stage1A in SBL X64 build.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
* [QEMU] Enable QEMU Linux boot in X64 mode
This patch enabled SBL X64 boot for Linux. At this moment, since
FSP is still in 32 bit mode, it is required to thunk back into
32 bit mode to call FSP APIs.
It fixed#622.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Due to missing normal function implementations in some x64 code, GCC
optimized many code off from the final image which caused synbol
patching issue later on. This patch fixed this.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
* Add missing X64 MdePkg Library
This adds some missing Library from EDKII Stable201911.
- MdePkg/Library/BaseMemoryLibRepStr/X64
- MdePkg/Library/BaseSynchronizationLib/X64
Signed-off-by: Aiden Park <aiden.park@intel.com>
* Make X64 target buildable
This is just to build X64 target - Not functional.
Signed-off-by: Aiden Park <aiden.park@intel.com>
Maurice Ma