[EHL] s0ix enable

Enable s0ix in EHL with changes below:
1. Disabled SPI1
2. Disabled TcssXdci
3. Disabled Xdci

Signed-off-by: Ong Kok Tong <kok.tong.ong@intel.com>

Platform/ElkhartlakeBoardPkg/AcpiTables/AcpiTables.inf

@@ -34,7 +34,7 @@
   Platform/CommonBoardPkg/AcpiTables/Fpdt/Fpdt.aslc
   Ssdt/SaSsdt.asl
   SsdtRtd3/EhlCrbRtd3.asl
-  //Lpit/Lpit.act
+  Lpit/Lpit.act
   Dmar/Dmar.aslc
   CpuSsdt/Cpu0Cst.asl
   CpuSsdt/Cpu0Hwp.asl

Platform/ElkhartlakeBoardPkg/AcpiTables/Dsdt/Dsdt.asl

@@ -192,7 +192,7 @@ DefinitionBlock (
   //Include ("PcieDock.asl")
   Include ("PchRpPxsxWrapper.asl")
   Include ("WifiDynamicSar.asl")
-  //Include ("Pep.asl")
+  Include ("Pep.asl")
   Include ("Psm.asl")
   Include ("Connectivity.asl")
   Include ("MipiCamSensors.asl")

Platform/ElkhartlakeBoardPkg/AcpiTables/Fadt/Fadt6.1.h

@@ -67,7 +67,8 @@
   EFI_ACPI_6_1_RTC_S4 | \
   EFI_ACPI_6_1_SLP_BUTTON | \
   EFI_ACPI_6_1_PROC_C1 | \
-  EFI_ACPI_6_1_RESET_REG_SUP \
+  EFI_ACPI_6_1_RESET_REG_SUP | \
+  EFI_ACPI_6_1_LOW_POWER_S0_IDLE_CAPABLE  \
   )
 
 

Platform/ElkhartlakeBoardPkg/AcpiTables/SsdtRtd3/EhlCrbRtd3.asl

@@ -220,9 +220,9 @@ External(WWAN_PCIE_ROOT_PORT.LASX)
       Name(SCLK, 0)
       Store(PS1C, SCLK)
       Include("Rtd3Pcie.asl")
-      //Scope(\_SB.PC00.RP01.PXSX) {
-        //Include("Rtd3PcieSsdStorage.asl")
-     //}
+      Scope(\_SB.PC00.RP01.PXSX) {
+        Include("Rtd3PcieSsdStorage.asl")
+      }
     }
 
   ///

Platform/ElkhartlakeBoardPkg/CfgData/CfgData_Ext_IotgCrb.dlt

@@ -25,6 +25,7 @@ GPIO_CFG_DATA.GpioPinConfig1_GPP_D13.GPIOSkip_GPP_D13 | 0
 
 # Enable to test TCC mode & tuning
 # FEATURES_CFG_DATA.Features.Tcc    | 0x1
+FEATURES_CFG_DATA.Features.LowPowerIdle      | 0x1
 
 # Preserve ISI SPI Pins across ResetResume power-cycling
 GPIO_CFG_DATA.GpioPinConfig1_GPP_U04.GPIOSkip_GPP_U04 | 0x0

Platform/ElkhartlakeBoardPkg/CfgData/CfgData_Features.yaml

@@ -18,7 +18,7 @@
     - $STRUCT      :
         name         : PlatformFeatures
         struct       : FEATURES_DATA
-        length       : 0x04
+        length       : 0x05
         value        : 0x00000003
     - Acpi         :
         name         : ACPI Enable
@@ -48,9 +48,16 @@
         help         : >
                        To 'opt-in' for debug, please select 'Enabled' with the desired debug probe type. Enabling this BIOS option may alter the default value of other debug-related BIOS options.\Manual- Do not use Platform Debug Consent to override other debug-relevant policies, but the user must set each debug option manually, aimed at advanced users.\nNote- DCI OOB (aka BSSB) uses CCA probe;[DCI OOB+DbC] and [USB2 DbC] have the same setting.
         length       : 3b
+    - LowPowerIdle   :
+        name         : Low Power Idle Enable
+        type         : Combo
+        option       : $EN_DIS
+        help         : >
+                       Enable/Disable Low Power Idle feature. 1:Low Power Idle Enabled, 0:Low Power Idle Disabled
+        length       : 1b
     - Rsvd         :
         name         : Reserved
         type         : Reserved
         help         : >
                        reserved bits
-        length       : 26b
+        length       : 25b

Platform/ElkhartlakeBoardPkg/Library/Stage1BBoardInitLib/Stage1BBoardInitLib.c

@@ -234,6 +234,7 @@ UpdateFspConfig (
   SECURITY_CFG_DATA             *SecCfgData;
   UINT32                        Index;
   UINT8                         DebugPort;
+  FEATURES_CFG_DATA             *FeaturesCfgData;
 
   FspmUpd                       = (FSPM_UPD *)FspmUpdPtr;
   FspmArchUpd                   = &FspmUpd->FspmArchUpd;
@@ -301,6 +302,7 @@ UpdateFspConfig (
     }
     CopyMem (&Fspmcfg->DmiGen3RxCtlePeaking, MemCfgData->DmiGen3RxCtlePeaking, sizeof(MemCfgData->DmiGen3RxCtlePeaking));
 
+    FeaturesCfgData               = (FEATURES_CFG_DATA *) FindConfigDataByTag(CDATA_FEATURES_TAG);
     // SA:TCSS_PEI_PREMEM_CONFIG
     Fspmcfg->UsbTcPortEnPreMem          = MemCfgData->UsbTcPortEnPreMem;
     Fspmcfg->PcieMultipleSegmentEnabled = MemCfgData->PcieMultipleSegmentEnabled;
@@ -310,6 +312,12 @@ UpdateFspConfig (
     Fspmcfg->TcssItbtPcie3En            = MemCfgData->TcssItbtPcie3En;
     Fspmcfg->TcssXhciEn                 = MemCfgData->TcssXhciEn;
     Fspmcfg->TcssXdciEn                 = MemCfgData->TcssXdciEn;
+    if (FeaturesCfgData != NULL) {
+      if (FeaturesCfgData->Features.LowPowerIdle != 0){
+        DEBUG ((DEBUG_INFO, "FeaturesCfgData->Features.LowPowerIdle = 0x%x\n",FeaturesCfgData->Features.LowPowerIdle));
+        Fspmcfg->TcssXdciEn             = 0;
+      }
+    }
     Fspmcfg->TcssDma0En                 = MemCfgData->TcssDma0En;
     Fspmcfg->TcssDma1En                 = MemCfgData->TcssDma1En;
 

Platform/ElkhartlakeBoardPkg/Library/Stage2BoardInitLib/Stage2BoardInitLib.c

@@ -1102,6 +1102,7 @@ UpdateFspConfig (
   SECURITY_CFG_DATA  *SecCfgData;
   SILICON_CFG_DATA   *SiCfgData;
   POWER_CFG_DATA     *PowerCfgData;
+  FEATURES_CFG_DATA  *FeaturesCfgData;
   UINT8              SaDisplayConfigTable[17] = { 0 };
 
   FspsUpd    = (FSPS_UPD *)FspsUpdPtr;
@@ -1202,6 +1203,13 @@ UpdateFspConfig (
   if (SiCfgData != NULL) {
     // Xdci
     Fspscfg->XdciEnable          = SiCfgData->XdciEnable;
+    FeaturesCfgData               = (FEATURES_CFG_DATA *) FindConfigDataByTag(CDATA_FEATURES_TAG);
+    if (FeaturesCfgData != NULL) {
+      if (FeaturesCfgData->Features.LowPowerIdle != 0){
+        DEBUG ((DEBUG_INFO, "FeaturesCfgData->Features.LowPowerIdle = 0x%x\n",FeaturesCfgData->Features.LowPowerIdle));
+        Fspscfg->XdciEnable          = 0;
+      }
+    }
 
     //CPU Config Data
     Fspscfg->AesEnable                   = SiCfgData->AesEnable;
@@ -1395,7 +1403,7 @@ UpdateFspConfig (
     Fspscfg->PchEspiLgmrEnable          = SiCfgData->PchEspiLgmrEnable;
 
     // PCH SPI_CONFIG
-    Fspscfg->SerialIoSpiMode[1]         = 2;
+    Fspscfg->SerialIoSpiMode[1]         = 0;
 
     Fspscfg->SerialIoSpiCsPolarity[0]   = 1;
     Fspscfg->SerialIoSpiCsPolarity[1]   = 1;
@@ -1516,8 +1524,8 @@ UpdateFspConfig (
     Fspscfg->PchTsnGbeSgmiiEnable    = 1;
 
     // PSE_TSN_CONFIG
-    Fspscfg->PseTsnGbeSgmiiEnable[0] = 1;
-    Fspscfg->PseTsnGbeSgmiiEnable[1] = 1;
+    Fspscfg->PseTsnGbeSgmiiEnable[0] = 0;
+    Fspscfg->PseTsnGbeSgmiiEnable[1] = 0;
     Fspscfg->PseTsnGbePhyInterfaceType[0]    = 1;
     Fspscfg->PseTsnGbePhyInterfaceType[1]    = 1;
 
@@ -1586,7 +1594,7 @@ UpdateFspConfig (
     // PchPse*Enable UPDs should be set to to 0x2 for
     // host ownership; set to 1 for PSE ownership.
     //
-    Fspscfg->PchUnlockGpioPads   = 0x1;
+    Fspscfg->PchUnlockGpioPads   = 0x0;
   }
 
   // W/A for Yocto boot issue

Platform/ElkhartlakeBoardPkg/Library/Stage2BoardInitLib/UpdateAcpiGnvs.c

@@ -671,7 +671,7 @@ PlatformUpdateAcpiGnvs (
 
   PlatformNvs->ApicEnable                       = 1;
   PlatformNvs->EcAvailable                      = 0;
-  PlatformNvs->LowPowerS0Idle                   = 0;
+  PlatformNvs->LowPowerS0Idle                   = 1;
 
   PlatformNvs->TenSecondPowerButtonEnable       = 8;