From c7935c10fb280e773400b3a3572755e13545880c Mon Sep 17 00:00:00 2001 From: Ong Kok Tong Date: Tue, 23 Mar 2021 16:28:43 +0800 Subject: [PATCH] [EHL] s0ix enable Enable s0ix in EHL with changes below: 1. Disabled SPI1 2. Disabled TcssXdci 3. Disabled Xdci Signed-off-by: Ong Kok Tong --- .../AcpiTables/AcpiTables.inf | 2 +- .../ElkhartlakeBoardPkg/AcpiTables/Dsdt/Dsdt.asl | 2 +- .../AcpiTables/Fadt/Fadt6.1.h | 3 ++- .../AcpiTables/SsdtRtd3/EhlCrbRtd3.asl | 6 +++--- .../CfgData/CfgData_Ext_IotgCrb.dlt | 1 + .../CfgData/CfgData_Features.yaml | 11 +++++++++-- .../Stage1BBoardInitLib/Stage1BBoardInitLib.c | 8 ++++++++ .../Stage2BoardInitLib/Stage2BoardInitLib.c | 16 ++++++++++++---- .../Library/Stage2BoardInitLib/UpdateAcpiGnvs.c | 2 +- 9 files changed, 38 insertions(+), 13 deletions(-) diff --git a/Platform/ElkhartlakeBoardPkg/AcpiTables/AcpiTables.inf b/Platform/ElkhartlakeBoardPkg/AcpiTables/AcpiTables.inf index ae49d400..a35e0ba0 100644 --- a/Platform/ElkhartlakeBoardPkg/AcpiTables/AcpiTables.inf +++ b/Platform/ElkhartlakeBoardPkg/AcpiTables/AcpiTables.inf @@ -34,7 +34,7 @@ Platform/CommonBoardPkg/AcpiTables/Fpdt/Fpdt.aslc Ssdt/SaSsdt.asl SsdtRtd3/EhlCrbRtd3.asl - //Lpit/Lpit.act + Lpit/Lpit.act Dmar/Dmar.aslc CpuSsdt/Cpu0Cst.asl CpuSsdt/Cpu0Hwp.asl diff --git a/Platform/ElkhartlakeBoardPkg/AcpiTables/Dsdt/Dsdt.asl b/Platform/ElkhartlakeBoardPkg/AcpiTables/Dsdt/Dsdt.asl index b780144e..4bae4c78 100644 --- a/Platform/ElkhartlakeBoardPkg/AcpiTables/Dsdt/Dsdt.asl +++ b/Platform/ElkhartlakeBoardPkg/AcpiTables/Dsdt/Dsdt.asl @@ -192,7 +192,7 @@ DefinitionBlock ( //Include ("PcieDock.asl") Include ("PchRpPxsxWrapper.asl") Include ("WifiDynamicSar.asl") - //Include ("Pep.asl") + Include ("Pep.asl") Include ("Psm.asl") Include ("Connectivity.asl") Include ("MipiCamSensors.asl") diff --git a/Platform/ElkhartlakeBoardPkg/AcpiTables/Fadt/Fadt6.1.h b/Platform/ElkhartlakeBoardPkg/AcpiTables/Fadt/Fadt6.1.h index 93a9849a..bbf709f2 100644 --- a/Platform/ElkhartlakeBoardPkg/AcpiTables/Fadt/Fadt6.1.h +++ b/Platform/ElkhartlakeBoardPkg/AcpiTables/Fadt/Fadt6.1.h @@ -67,7 +67,8 @@ EFI_ACPI_6_1_RTC_S4 | \ EFI_ACPI_6_1_SLP_BUTTON | \ EFI_ACPI_6_1_PROC_C1 | \ - EFI_ACPI_6_1_RESET_REG_SUP \ + EFI_ACPI_6_1_RESET_REG_SUP | \ + EFI_ACPI_6_1_LOW_POWER_S0_IDLE_CAPABLE \ ) diff --git a/Platform/ElkhartlakeBoardPkg/AcpiTables/SsdtRtd3/EhlCrbRtd3.asl b/Platform/ElkhartlakeBoardPkg/AcpiTables/SsdtRtd3/EhlCrbRtd3.asl index 65ccc7ac..bb9e2f2c 100644 --- a/Platform/ElkhartlakeBoardPkg/AcpiTables/SsdtRtd3/EhlCrbRtd3.asl +++ b/Platform/ElkhartlakeBoardPkg/AcpiTables/SsdtRtd3/EhlCrbRtd3.asl @@ -220,9 +220,9 @@ External(WWAN_PCIE_ROOT_PORT.LASX) Name(SCLK, 0) Store(PS1C, SCLK) Include("Rtd3Pcie.asl") - //Scope(\_SB.PC00.RP01.PXSX) { - //Include("Rtd3PcieSsdStorage.asl") - //} + Scope(\_SB.PC00.RP01.PXSX) { + Include("Rtd3PcieSsdStorage.asl") + } } /// diff --git a/Platform/ElkhartlakeBoardPkg/CfgData/CfgData_Ext_IotgCrb.dlt b/Platform/ElkhartlakeBoardPkg/CfgData/CfgData_Ext_IotgCrb.dlt index aba6c130..4ad864b6 100644 --- a/Platform/ElkhartlakeBoardPkg/CfgData/CfgData_Ext_IotgCrb.dlt +++ b/Platform/ElkhartlakeBoardPkg/CfgData/CfgData_Ext_IotgCrb.dlt @@ -25,6 +25,7 @@ GPIO_CFG_DATA.GpioPinConfig1_GPP_D13.GPIOSkip_GPP_D13 | 0 # Enable to test TCC mode & tuning # FEATURES_CFG_DATA.Features.Tcc | 0x1 +FEATURES_CFG_DATA.Features.LowPowerIdle | 0x1 # Preserve ISI SPI Pins across ResetResume power-cycling GPIO_CFG_DATA.GpioPinConfig1_GPP_U04.GPIOSkip_GPP_U04 | 0x0 diff --git a/Platform/ElkhartlakeBoardPkg/CfgData/CfgData_Features.yaml b/Platform/ElkhartlakeBoardPkg/CfgData/CfgData_Features.yaml index 64098bd7..3f1ea80b 100644 --- a/Platform/ElkhartlakeBoardPkg/CfgData/CfgData_Features.yaml +++ b/Platform/ElkhartlakeBoardPkg/CfgData/CfgData_Features.yaml @@ -18,7 +18,7 @@ - $STRUCT : name : PlatformFeatures struct : FEATURES_DATA - length : 0x04 + length : 0x05 value : 0x00000003 - Acpi : name : ACPI Enable @@ -48,9 +48,16 @@ help : > To 'opt-in' for debug, please select 'Enabled' with the desired debug probe type. Enabling this BIOS option may alter the default value of other debug-related BIOS options.\Manual- Do not use Platform Debug Consent to override other debug-relevant policies, but the user must set each debug option manually, aimed at advanced users.\nNote- DCI OOB (aka BSSB) uses CCA probe;[DCI OOB+DbC] and [USB2 DbC] have the same setting. length : 3b + - LowPowerIdle : + name : Low Power Idle Enable + type : Combo + option : $EN_DIS + help : > + Enable/Disable Low Power Idle feature. 1:Low Power Idle Enabled, 0:Low Power Idle Disabled + length : 1b - Rsvd : name : Reserved type : Reserved help : > reserved bits - length : 26b + length : 25b diff --git a/Platform/ElkhartlakeBoardPkg/Library/Stage1BBoardInitLib/Stage1BBoardInitLib.c b/Platform/ElkhartlakeBoardPkg/Library/Stage1BBoardInitLib/Stage1BBoardInitLib.c index 00d0b00c..f526ae27 100644 --- a/Platform/ElkhartlakeBoardPkg/Library/Stage1BBoardInitLib/Stage1BBoardInitLib.c +++ b/Platform/ElkhartlakeBoardPkg/Library/Stage1BBoardInitLib/Stage1BBoardInitLib.c @@ -234,6 +234,7 @@ UpdateFspConfig ( SECURITY_CFG_DATA *SecCfgData; UINT32 Index; UINT8 DebugPort; + FEATURES_CFG_DATA *FeaturesCfgData; FspmUpd = (FSPM_UPD *)FspmUpdPtr; FspmArchUpd = &FspmUpd->FspmArchUpd; @@ -301,6 +302,7 @@ UpdateFspConfig ( } CopyMem (&Fspmcfg->DmiGen3RxCtlePeaking, MemCfgData->DmiGen3RxCtlePeaking, sizeof(MemCfgData->DmiGen3RxCtlePeaking)); + FeaturesCfgData = (FEATURES_CFG_DATA *) FindConfigDataByTag(CDATA_FEATURES_TAG); // SA:TCSS_PEI_PREMEM_CONFIG Fspmcfg->UsbTcPortEnPreMem = MemCfgData->UsbTcPortEnPreMem; Fspmcfg->PcieMultipleSegmentEnabled = MemCfgData->PcieMultipleSegmentEnabled; @@ -310,6 +312,12 @@ UpdateFspConfig ( Fspmcfg->TcssItbtPcie3En = MemCfgData->TcssItbtPcie3En; Fspmcfg->TcssXhciEn = MemCfgData->TcssXhciEn; Fspmcfg->TcssXdciEn = MemCfgData->TcssXdciEn; + if (FeaturesCfgData != NULL) { + if (FeaturesCfgData->Features.LowPowerIdle != 0){ + DEBUG ((DEBUG_INFO, "FeaturesCfgData->Features.LowPowerIdle = 0x%x\n",FeaturesCfgData->Features.LowPowerIdle)); + Fspmcfg->TcssXdciEn = 0; + } + } Fspmcfg->TcssDma0En = MemCfgData->TcssDma0En; Fspmcfg->TcssDma1En = MemCfgData->TcssDma1En; diff --git a/Platform/ElkhartlakeBoardPkg/Library/Stage2BoardInitLib/Stage2BoardInitLib.c b/Platform/ElkhartlakeBoardPkg/Library/Stage2BoardInitLib/Stage2BoardInitLib.c index d3c52c95..11f19d8d 100644 --- a/Platform/ElkhartlakeBoardPkg/Library/Stage2BoardInitLib/Stage2BoardInitLib.c +++ b/Platform/ElkhartlakeBoardPkg/Library/Stage2BoardInitLib/Stage2BoardInitLib.c @@ -1102,6 +1102,7 @@ UpdateFspConfig ( SECURITY_CFG_DATA *SecCfgData; SILICON_CFG_DATA *SiCfgData; POWER_CFG_DATA *PowerCfgData; + FEATURES_CFG_DATA *FeaturesCfgData; UINT8 SaDisplayConfigTable[17] = { 0 }; FspsUpd = (FSPS_UPD *)FspsUpdPtr; @@ -1202,6 +1203,13 @@ UpdateFspConfig ( if (SiCfgData != NULL) { // Xdci Fspscfg->XdciEnable = SiCfgData->XdciEnable; + FeaturesCfgData = (FEATURES_CFG_DATA *) FindConfigDataByTag(CDATA_FEATURES_TAG); + if (FeaturesCfgData != NULL) { + if (FeaturesCfgData->Features.LowPowerIdle != 0){ + DEBUG ((DEBUG_INFO, "FeaturesCfgData->Features.LowPowerIdle = 0x%x\n",FeaturesCfgData->Features.LowPowerIdle)); + Fspscfg->XdciEnable = 0; + } + } //CPU Config Data Fspscfg->AesEnable = SiCfgData->AesEnable; @@ -1395,7 +1403,7 @@ UpdateFspConfig ( Fspscfg->PchEspiLgmrEnable = SiCfgData->PchEspiLgmrEnable; // PCH SPI_CONFIG - Fspscfg->SerialIoSpiMode[1] = 2; + Fspscfg->SerialIoSpiMode[1] = 0; Fspscfg->SerialIoSpiCsPolarity[0] = 1; Fspscfg->SerialIoSpiCsPolarity[1] = 1; @@ -1516,8 +1524,8 @@ UpdateFspConfig ( Fspscfg->PchTsnGbeSgmiiEnable = 1; // PSE_TSN_CONFIG - Fspscfg->PseTsnGbeSgmiiEnable[0] = 1; - Fspscfg->PseTsnGbeSgmiiEnable[1] = 1; + Fspscfg->PseTsnGbeSgmiiEnable[0] = 0; + Fspscfg->PseTsnGbeSgmiiEnable[1] = 0; Fspscfg->PseTsnGbePhyInterfaceType[0] = 1; Fspscfg->PseTsnGbePhyInterfaceType[1] = 1; @@ -1586,7 +1594,7 @@ UpdateFspConfig ( // PchPse*Enable UPDs should be set to to 0x2 for // host ownership; set to 1 for PSE ownership. // - Fspscfg->PchUnlockGpioPads = 0x1; + Fspscfg->PchUnlockGpioPads = 0x0; } // W/A for Yocto boot issue diff --git a/Platform/ElkhartlakeBoardPkg/Library/Stage2BoardInitLib/UpdateAcpiGnvs.c b/Platform/ElkhartlakeBoardPkg/Library/Stage2BoardInitLib/UpdateAcpiGnvs.c index 973def80..1f37bcff 100644 --- a/Platform/ElkhartlakeBoardPkg/Library/Stage2BoardInitLib/UpdateAcpiGnvs.c +++ b/Platform/ElkhartlakeBoardPkg/Library/Stage2BoardInitLib/UpdateAcpiGnvs.c @@ -671,7 +671,7 @@ PlatformUpdateAcpiGnvs ( PlatformNvs->ApicEnable = 1; PlatformNvs->EcAvailable = 0; - PlatformNvs->LowPowerS0Idle = 0; + PlatformNvs->LowPowerS0Idle = 1; PlatformNvs->TenSecondPowerButtonEnable = 8;