Add SBL Resiliency Support to ADL-N
Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
This commit is contained in:
Sean McGinn
Guo Dong
parent
9361ac2d57
commit
82274c1567
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@ -721,6 +721,10 @@ UpdateFspConfig (
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FspsConfig->EnableTimedGpio1 = SiCfgData->EnableTimedGpio1;
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FspsConfig->PchPmSlpAMinAssert = SiCfgData->PchPmSlpAMinAssert;
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if (PcdGetBool (PcdSblResiliencyEnabled)) {
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FspsConfig->EnableTcoTimer = 0x1;
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}
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// UFS
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if (IsPchLp ()) {
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FspsConfig->UfsEnable[0] = SiCfgData->PchUfsEnable[0];
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@ -45,5 +45,7 @@
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gPlatformCommonLibTokenSpaceGuid.PcdTccEnabled
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gPlatformModuleTokenSpaceGuid.PcdEnablePciePm
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gPlatformModuleTokenSpaceGuid.PcdFastBootEnabled
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gPlatformModuleTokenSpaceGuid.PcdSblResiliencyEnabled
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[FixedPcd]
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gPlatformAlderLakeTokenSpaceGuid.PcdAdlLpSupport
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@ -22,6 +22,7 @@
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#include <GpioPinsVer2Lp.h>
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#include <Library/ConfigDataLib.h>
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#include <Library/PchInfoLib.h>
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#include <Library/TcoTimerLib.h>
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#define UCODE_REGION_BASE FixedPcdGet32(PcdUcodeBase)
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#define UCODE_REGION_SIZE FixedPcdGet32(PcdUcodeSize)
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@ -142,7 +143,7 @@ BoardInit (
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switch (InitPhase) {
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case PostTempRamInit:
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DisableWatchDogTimer ();
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InitTcoTimer ();
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EarlyPlatformDataCheck ();
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DebugPort = GetDebugPort ();
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@ -44,6 +44,7 @@
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GpioLib
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ConfigDataLib
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PchInfoLib
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TcoTimerLib
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[Guids]
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@ -169,6 +169,9 @@ PlatformDeviceTableInitialize (
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SetDeviceTable (PltDeviceTable);
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}
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// clear SmBus in use status as TCO timer reload causes it to be marked in use here
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SmBusClearInUseStatus ();
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}
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VOID
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@ -176,13 +179,9 @@ FwuTopSwapSetting (
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IN FW_UPDATE_STATUS *pFwUpdStatus
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)
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{
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UINT32 Data32;
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UINT32 TopSwapReg;
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UINT32 P2sbBar;
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EFI_STATUS Status;
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UINT32 RsvdBase;
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UINT32 RsvdSize;
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UINTN P2sbBase;
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if (pFwUpdStatus == NULL) {
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Status = GetComponentInfoByPartition (FLASH_MAP_SIG_BLRESERVED, FALSE, &RsvdBase, &RsvdSize);
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@ -192,43 +191,28 @@ FwuTopSwapSetting (
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pFwUpdStatus = (FW_UPDATE_STATUS *)(UINTN)RsvdBase;
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}
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//
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// Get Top swap register Bit0 in PCH Private Configuration Space.
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//
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P2sbBase = MM_PCI_ADDRESS (0, PCI_DEVICE_NUMBER_PCH_LPC, 1, 0); // P2SB device base
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if (MmioRead16 (P2sbBase) == 0xFFFF) {
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//
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// unhide P2SB
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//
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MmioWrite8 (P2sbBase + 0xE1, 0);
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DEBUG ((DEBUG_INFO, "P2sb is hidden, unhide it\n"));
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// If in a recovery path, stay on current partition
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if (PcdGetBool (PcdSblResiliencyEnabled) &&
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(GetFailedBootCount () >= PcdGet8 (PcdBootFailureThreshold) ||
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pFwUpdStatus->StateMachine == FW_UPDATE_SM_RECOVERY)) {
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return;
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}
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P2sbBar = MmioRead32 (P2sbBase + 0x10);
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P2sbBar &= 0xFFFFFFF0;
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ASSERT (P2sbBar != 0xFFFFFFF0);
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TopSwapReg = P2sbBar | ((PID_RTC_HOST) << 16) | (UINT16)(R_RTC_PCR_BUC);
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Data32 = MmioRead32 (TopSwapReg);
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DEBUG ((DEBUG_INFO, "TopSwapReg=0x%x\n", Data32));
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if (pFwUpdStatus->StateMachine == FW_UPDATE_SM_PART_A) {
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if (GetCurrentBootPartition() == 0) {
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SetBootPartition(1);
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ResetSystem(EfiResetCold);
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if (GetCurrentBootPartition () == PrimaryPartition) {
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SetBootPartition (BackupPartition);
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ResetSystem (EfiResetCold);
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}
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} else if (pFwUpdStatus->StateMachine == FW_UPDATE_SM_PART_B) {
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if (GetCurrentBootPartition() == 1) {
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SetBootPartition(0);
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ResetSystem(EfiResetCold);
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if (GetCurrentBootPartition () == BackupPartition) {
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SetBootPartition (PrimaryPartition);
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ResetSystem (EfiResetCold);
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}
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} else {
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if (GetCurrentBootPartition () == BackupPartition) {
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SetBootPartition (PrimaryPartition);
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ResetSystem (EfiResetCold);
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}
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}
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else{
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if (GetCurrentBootPartition() == 1) {
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SetBootPartition(0);
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ResetSystem(EfiResetCold);
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}
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DEBUG ((DEBUG_INFO, "Not in Firmware Update mode.\n"));
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}
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}
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@ -243,6 +227,7 @@ FwuTopSwapSetting (
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BOOLEAN
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IsFirmwareUpdate ()
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{
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//
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// Check if state machine is set to capsule processing mode.
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//
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@ -257,6 +242,14 @@ IsFirmwareUpdate ()
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return TRUE;
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}
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//
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// Check if we need to recover a failing partition.
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//
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if (PcdGetBool (PcdSblResiliencyEnabled) &&
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GetFailedBootCount () >= PcdGet8 (PcdBootFailureThreshold)) {
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return TRUE;
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}
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return FALSE;
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}
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@ -45,8 +45,8 @@
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#include <Include/TccConfigSubRegions.h>
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#include <Library/PchInfoLib.h>
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#include <Library/VariableLib.h>
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#include <Library/FirmwareUpdateLib.h>
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#include <Library/GpioLib.h>
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#include <Library/TopSwapLib.h>
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#include "GpioTableAdlSPreMem.h"
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#include "GpioTableAdlPPreMem.h"
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#include "GpioTableAdlNPreMem.h"
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@ -56,6 +56,7 @@
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#include <Include/CpuRegs.h>
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#include <Register/Cpuid.h>
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#include <Library/SocInitLib.h>
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#include <Library/SmbusLib.h>
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/**
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Initialize Variable.
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@ -63,6 +63,7 @@
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WatchDogTimerLib
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FspmUpdUpdateLib
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SmbusLib
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TopSwapLib
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[Guids]
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gFspNonVolatileStorageHobGuid
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@ -79,6 +80,8 @@
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gPlatformCommonLibTokenSpaceGuid.PcdMeasuredBootEnabled
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gPlatformCommonLibTokenSpaceGuid.PcdVerifiedBootEnabled
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gPlatformCommonLibTokenSpaceGuid.PcdTccEnabled
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gPlatformModuleTokenSpaceGuid.PcdSblResiliencyEnabled
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gPlatformModuleTokenSpaceGuid.PcdBootFailureThreshold
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[FixedPcd]
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gPlatformAlderLakeTokenSpaceGuid.PcdAdlLpSupport
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@ -9,7 +9,6 @@
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#include <Library/IoLib.h>
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#include <RegAccess.h>
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#include <PlatformBase.h>
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#include <Register/TcoRegs.h>
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/**
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Disable watch dog timer
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@ -20,15 +19,6 @@ DisableWatchDogTimer (
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VOID
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)
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{
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//
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// Halt the TCO timer
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//
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IoOr16 (TCO_BASE_ADDRESS + R_TCO_IO_TCO1_CNT, B_TCO_IO_TCO1_CNT_TMR_HLT);
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//
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// Clear the Second TO status bit
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//
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IoOr8 (TCO_BASE_ADDRESS + R_TCO_IO_TCO2_STS, B_TCO_IO_TCO2_STS_SECOND_TO);
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}
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/**
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@ -26,7 +26,6 @@
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MdePkg/MdePkg.dec
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BootloaderCorePkg/BootloaderCorePkg.dec
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Silicon/AlderlakePkg/AlderlakePkg.dec
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Silicon/CommonSocPkg/CommonSocPkg.dec
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[LibraryClasses]
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BaseLib
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