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fix: [MTL] Debug fsp log go to wrong port (#2243) 

Issue: fsp debug log goes to EC port on RVP.
This fix also require FSP update to BIOS version 4053_51 or newer.

Signed-off-by: Randy <randy.lin@intel.com>
This commit is contained in:
randylintw 2024-08-02 15:47:27 +08:00 committed by GitHub
parent 78b7e09f9a
commit 808eb64f89
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GPG Key ID: B5690EEEBB952194
1 changed files with 3 additions and 2 deletions
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5
Platform/MeteorlakeBoardPkg/Library/FspmUpdUpdateLib/FspmUpdUpdateLib.c
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@ -115,17 +115,18 @@ UpdateFspConfig (
DebugPort = GetDebugPort ();
if (DebugPort < GetPchMaxSerialIoUartControllersNum ()) {
Fspmcfg->PcdDebugInterfaceFlags = BIT4 | BIT5;
Fspmcfg->SerialIoUartDebugControllerNumber = DebugPort;
Fspmcfg->SerialIoUartDebugMode = 4;
} else {
Fspmcfg->PcdDebugInterfaceFlags = BIT1;
if (DebugPort == 0xFF) {
Fspmcfg->PcdIsaSerialUartBase = 0;
} else {
Fspmcfg->PcdIsaSerialUartBase = 1;
}
}
Fspmcfg->PcdSerialDebugLevel = 0x3;
Fspmcfg->PcdDebugInterfaceFlags = BIT1;
Fspmcfg->PcdSerialDebugLevel = 0x5;
// Memory SPD Data
//Update if embedded memory needed