From 808eb64f899b08a485d135c2cc78019e715b5496 Mon Sep 17 00:00:00 2001 From: randylintw Date: Fri, 2 Aug 2024 15:47:27 +0800 Subject: [PATCH] fix: [MTL] Debug fsp log go to wrong port (#2243) Issue: fsp debug log goes to EC port on RVP. This fix also require FSP update to BIOS version 4053_51 or newer. Signed-off-by: Randy --- .../Library/FspmUpdUpdateLib/FspmUpdUpdateLib.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Platform/MeteorlakeBoardPkg/Library/FspmUpdUpdateLib/FspmUpdUpdateLib.c b/Platform/MeteorlakeBoardPkg/Library/FspmUpdUpdateLib/FspmUpdUpdateLib.c index 74ed8d87..b71aab4f 100644 --- a/Platform/MeteorlakeBoardPkg/Library/FspmUpdUpdateLib/FspmUpdUpdateLib.c +++ b/Platform/MeteorlakeBoardPkg/Library/FspmUpdUpdateLib/FspmUpdUpdateLib.c @@ -115,17 +115,18 @@ UpdateFspConfig ( DebugPort = GetDebugPort (); if (DebugPort < GetPchMaxSerialIoUartControllersNum ()) { + Fspmcfg->PcdDebugInterfaceFlags = BIT4 | BIT5; Fspmcfg->SerialIoUartDebugControllerNumber = DebugPort; Fspmcfg->SerialIoUartDebugMode = 4; } else { + Fspmcfg->PcdDebugInterfaceFlags = BIT1; if (DebugPort == 0xFF) { Fspmcfg->PcdIsaSerialUartBase = 0; } else { Fspmcfg->PcdIsaSerialUartBase = 1; } } - Fspmcfg->PcdSerialDebugLevel = 0x3; - Fspmcfg->PcdDebugInterfaceFlags = BIT1; + Fspmcfg->PcdSerialDebugLevel = 0x5; // Memory SPD Data //Update if embedded memory needed