OrgACRN
/
slimbootloader
mirror of https://github.com/slimbootloader/slimbootloader.git
1
0
Fork 0
Code Issues Releases Wiki Activity

Remove redundant PchSbiAccessLib.h 

Remove PchSbiAccessLib.h from platform-specific
folders, and use common one.

Signed-off-by: Sai T <sai.kiran.talamudupula@intel.com>
This commit is contained in:
Sai T 2021-09-16 12:57:29 -07:00 committed by Guo Dong
parent de3b09f331
commit 1bb16e60c4
10 changed files with 6 additions and 755 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

158
Silicon/CoffeelakePkg/Include/Library/PchSbiAccessLib.h
View File

@ -1,158 +0,0 @@
/** @file
Header file for PchSbiAccessLib.
Copyright (c) 2018 - 2019, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _PCH_SBI_ACCESS_LIB_H_
#define _PCH_SBI_ACCESS_LIB_H_
typedef UINT8 PCH_SBI_PID;
/**
PCH SBI Register structure
**/
typedef struct {
UINT32 SbiAddr;
UINT32 SbiExtAddr;
UINT32 SbiData;
UINT16 SbiStat;
UINT16 SbiRid;
} PCH_SBI_REGISTER_STRUCT;
/**
PCH SBI opcode definitions
**/
typedef enum {
MemoryRead = 0x0,
MemoryWrite = 0x1,
PciConfigRead = 0x4,
PciConfigWrite = 0x5,
PrivateControlRead = 0x6,
PrivateControlWrite = 0x7,
GpioLockUnlock = 0x13
} PCH_SBI_OPCODE;
/**
PCH SBI response status definitions
**/
typedef enum {
SBI_SUCCESSFUL = 0,
SBI_UNSUCCESSFUL = 1,
SBI_POWERDOWN = 2,
SBI_MIXED = 3,
SBI_INVALID_RESPONSE
} PCH_SBI_RESPONSE;
/**
Execute PCH SBI message
Take care of that there is no lock protection when using SBI programming in both POST time and SMI.
It will clash with POST time SBI programming when SMI happen.
Programmer MUST do the save and restore opration while using the PchSbiExecution inside SMI
to prevent from racing condition.
This function will reveal P2SB and hide P2SB if it's originally hidden. If more than one SBI access
needed, it's better to unhide the P2SB before calling and hide it back after done.
When the return value is "EFI_SUCCESS", the "Response" do not need to be checked as it would have been
SBI_SUCCESS. If the return value is "EFI_DEVICE_ERROR", then this would provide additional information
when needed.
@param[in] Pid Port ID of the SBI message
@param[in] Offset Offset of the SBI message
@param[in] Opcode Opcode
@param[in] Posted Posted message
@param[in, out] Data32 Read/Write data
@param[out] Response Response
@retval EFI_SUCCESS Successfully completed.
@retval EFI_DEVICE_ERROR Transaction fail
@retval EFI_INVALID_PARAMETER Invalid parameter
**/
EFI_STATUS
EFIAPI
PchSbiExecution (
IN PCH_SBI_PID Pid,
IN UINT64 Offset,
IN PCH_SBI_OPCODE Opcode,
IN BOOLEAN Posted,
IN OUT UINT32 *Data32,
OUT UINT8 *Response
);
/**
Full function for executing PCH SBI message
Take care of that there is no lock protection when using SBI programming in both POST time and SMI.
It will clash with POST time SBI programming when SMI happen.
Programmer MUST do the save and restore opration while using the PchSbiExecution inside SMI
to prevent from racing condition.
This function will reveal P2SB and hide P2SB if it's originally hidden. If more than one SBI access
needed, it's better to unhide the P2SB before calling and hide it back after done.
When the return value is "EFI_SUCCESS", the "Response" do not need to be checked as it would have been
SBI_SUCCESS. If the return value is "EFI_DEVICE_ERROR", then this would provide additional information
when needed.
@param[in] Pid Port ID of the SBI message
@param[in] Offset Offset of the SBI message
@param[in] Opcode Opcode
@param[in] Posted Posted message
@param[in] Fbe First byte enable
@param[in] Bar Bar
@param[in] Fid Function ID
@param[in, out] Data32 Read/Write data
@param[out] Response Response
@retval EFI_SUCCESS Successfully completed.
@retval EFI_DEVICE_ERROR Transaction fail
@retval EFI_INVALID_PARAMETER Invalid parameter
**/
EFI_STATUS
EFIAPI
PchSbiExecutionEx (
IN PCH_SBI_PID Pid,
IN UINT64 Offset,
IN PCH_SBI_OPCODE Opcode,
IN BOOLEAN Posted,
IN UINT16 Fbe,
IN UINT16 Bar,
IN UINT16 Fid,
IN OUT UINT32 *Data32,
OUT UINT8 *Response
);
/**
This function saves all PCH SBI registers.
The save and restore operations must be done while using the PchSbiExecution inside SMM.
It prevents the racing condition of PchSbiExecution re-entry between POST and SMI.
Before using this function, make sure the P2SB is not hidden.
@param[in, out] PchSbiRegister Structure for saving the registers
@retval EFI_SUCCESS Successfully completed.
@retval EFI_DEVICE_ERROR Device is hidden.
**/
EFI_STATUS
EFIAPI
PchSbiRegisterSave (
IN OUT PCH_SBI_REGISTER_STRUCT *PchSbiRegister
);
/**
This function restores all PCH SBI registers
The save and restore operations must be done while using the PchSbiExecution inside SMM.
It prevents the racing condition of PchSbiExecution re-entry between POST and SMI.
Before using this function, make sure the P2SB is not hidden.
@param[in] PchSbiRegister Structure for restoring the registers
@retval EFI_SUCCESS Successfully completed.
@retval EFI_DEVICE_ERROR Device is hidden.
**/
EFI_STATUS
EFIAPI
PchSbiRegisterRestore (
IN PCH_SBI_REGISTER_STRUCT *PchSbiRegister
);
#endif // _PCH_SBI_ACCESS_LIB_H_

158
Silicon/CometlakePkg/Include/Library/PchSbiAccessLib.h
View File

@ -1,158 +0,0 @@
/** @file
Header file for PchSbiAccessLib.
Copyright (c) 2018 - 2019, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _PCH_SBI_ACCESS_LIB_H_
#define _PCH_SBI_ACCESS_LIB_H_
typedef UINT8 PCH_SBI_PID;
/**
PCH SBI Register structure
**/
typedef struct {
UINT32 SbiAddr;
UINT32 SbiExtAddr;
UINT32 SbiData;
UINT16 SbiStat;
UINT16 SbiRid;
} PCH_SBI_REGISTER_STRUCT;
/**
PCH SBI opcode definitions
**/
typedef enum {
MemoryRead = 0x0,
MemoryWrite = 0x1,
PciConfigRead = 0x4,
PciConfigWrite = 0x5,
PrivateControlRead = 0x6,
PrivateControlWrite = 0x7,
GpioLockUnlock = 0x13
} PCH_SBI_OPCODE;
/**
PCH SBI response status definitions
**/
typedef enum {
SBI_SUCCESSFUL = 0,
SBI_UNSUCCESSFUL = 1,
SBI_POWERDOWN = 2,
SBI_MIXED = 3,
SBI_INVALID_RESPONSE
} PCH_SBI_RESPONSE;
/**
Execute PCH SBI message
Take care of that there is no lock protection when using SBI programming in both POST time and SMI.
It will clash with POST time SBI programming when SMI happen.
Programmer MUST do the save and restore opration while using the PchSbiExecution inside SMI
to prevent from racing condition.
This function will reveal P2SB and hide P2SB if it's originally hidden. If more than one SBI access
needed, it's better to unhide the P2SB before calling and hide it back after done.
When the return value is "EFI_SUCCESS", the "Response" do not need to be checked as it would have been
SBI_SUCCESS. If the return value is "EFI_DEVICE_ERROR", then this would provide additional information
when needed.
@param[in] Pid Port ID of the SBI message
@param[in] Offset Offset of the SBI message
@param[in] Opcode Opcode
@param[in] Posted Posted message
@param[in, out] Data32 Read/Write data
@param[out] Response Response
@retval EFI_SUCCESS Successfully completed.
@retval EFI_DEVICE_ERROR Transaction fail
@retval EFI_INVALID_PARAMETER Invalid parameter
**/
EFI_STATUS
EFIAPI
PchSbiExecution (
IN PCH_SBI_PID Pid,
IN UINT64 Offset,
IN PCH_SBI_OPCODE Opcode,
IN BOOLEAN Posted,
IN OUT UINT32 *Data32,
OUT UINT8 *Response
);
/**
Full function for executing PCH SBI message
Take care of that there is no lock protection when using SBI programming in both POST time and SMI.
It will clash with POST time SBI programming when SMI happen.
Programmer MUST do the save and restore opration while using the PchSbiExecution inside SMI
to prevent from racing condition.
This function will reveal P2SB and hide P2SB if it's originally hidden. If more than one SBI access
needed, it's better to unhide the P2SB before calling and hide it back after done.
When the return value is "EFI_SUCCESS", the "Response" do not need to be checked as it would have been
SBI_SUCCESS. If the return value is "EFI_DEVICE_ERROR", then this would provide additional information
when needed.
@param[in] Pid Port ID of the SBI message
@param[in] Offset Offset of the SBI message
@param[in] Opcode Opcode
@param[in] Posted Posted message
@param[in] Fbe First byte enable
@param[in] Bar Bar
@param[in] Fid Function ID
@param[in, out] Data32 Read/Write data
@param[out] Response Response
@retval EFI_SUCCESS Successfully completed.
@retval EFI_DEVICE_ERROR Transaction fail
@retval EFI_INVALID_PARAMETER Invalid parameter
**/
EFI_STATUS
EFIAPI
PchSbiExecutionEx (
IN PCH_SBI_PID Pid,
IN UINT64 Offset,
IN PCH_SBI_OPCODE Opcode,
IN BOOLEAN Posted,
IN UINT16 Fbe,
IN UINT16 Bar,
IN UINT16 Fid,
IN OUT UINT32 *Data32,
OUT UINT8 *Response
);
/**
This function saves all PCH SBI registers.
The save and restore operations must be done while using the PchSbiExecution inside SMM.
It prevents the racing condition of PchSbiExecution re-entry between POST and SMI.
Before using this function, make sure the P2SB is not hidden.
@param[in, out] PchSbiRegister Structure for saving the registers
@retval EFI_SUCCESS Successfully completed.
@retval EFI_DEVICE_ERROR Device is hidden.
**/
EFI_STATUS
EFIAPI
PchSbiRegisterSave (
IN OUT PCH_SBI_REGISTER_STRUCT *PchSbiRegister
);
/**
This function restores all PCH SBI registers
The save and restore operations must be done while using the PchSbiExecution inside SMM.
It prevents the racing condition of PchSbiExecution re-entry between POST and SMI.
Before using this function, make sure the P2SB is not hidden.
@param[in] PchSbiRegister Structure for restoring the registers
@retval EFI_SUCCESS Successfully completed.
@retval EFI_DEVICE_ERROR Device is hidden.
**/
EFI_STATUS
EFIAPI
PchSbiRegisterRestore (
IN PCH_SBI_REGISTER_STRUCT *PchSbiRegister
);
#endif // _PCH_SBI_ACCESS_LIB_H_

1
Silicon/CometlakePkg/Library/FirmwareUpdateLib/FirmwareUpdateLib.inf
View File

@ -24,6 +24,7 @@
Silicon/CometlakePkg/CometlakePkg.dec
BootloaderCorePkg/BootloaderCorePkg.dec
BootloaderCommonPkg/BootloaderCommonPkg.dec
Silicon/CommonSocPkg/CommonSocPkg.dec
PayloadPkg/PayloadPkg.dec
[LibraryClasses]

158
Silicon/CometlakevPkg/Include/Library/PchSbiAccessLib.h
View File

@ -1,158 +0,0 @@
/** @file
Header file for PchSbiAccessLib.
Copyright (c) 2018 - 2019, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _PCH_SBI_ACCESS_LIB_H_
#define _PCH_SBI_ACCESS_LIB_H_
typedef UINT8 PCH_SBI_PID;
/**
PCH SBI Register structure
**/
typedef struct {
UINT32 SbiAddr;
UINT32 SbiExtAddr;
UINT32 SbiData;
UINT16 SbiStat;
UINT16 SbiRid;
} PCH_SBI_REGISTER_STRUCT;
/**
PCH SBI opcode definitions
**/
typedef enum {
MemoryRead = 0x0,
MemoryWrite = 0x1,
PciConfigRead = 0x4,
PciConfigWrite = 0x5,
PrivateControlRead = 0x6,
PrivateControlWrite = 0x7,
GpioLockUnlock = 0x13
} PCH_SBI_OPCODE;
/**
PCH SBI response status definitions
**/
typedef enum {
SBI_SUCCESSFUL = 0,
SBI_UNSUCCESSFUL = 1,
SBI_POWERDOWN = 2,
SBI_MIXED = 3,
SBI_INVALID_RESPONSE
} PCH_SBI_RESPONSE;
/**
Execute PCH SBI message
Take care of that there is no lock protection when using SBI programming in both POST time and SMI.
It will clash with POST time SBI programming when SMI happen.
Programmer MUST do the save and restore opration while using the PchSbiExecution inside SMI
to prevent from racing condition.
This function will reveal P2SB and hide P2SB if it's originally hidden. If more than one SBI access
needed, it's better to unhide the P2SB before calling and hide it back after done.
When the return value is "EFI_SUCCESS", the "Response" do not need to be checked as it would have been
SBI_SUCCESS. If the return value is "EFI_DEVICE_ERROR", then this would provide additional information
when needed.
@param[in] Pid Port ID of the SBI message
@param[in] Offset Offset of the SBI message
@param[in] Opcode Opcode
@param[in] Posted Posted message
@param[in, out] Data32 Read/Write data
@param[out] Response Response
@retval EFI_SUCCESS Successfully completed.
@retval EFI_DEVICE_ERROR Transaction fail
@retval EFI_INVALID_PARAMETER Invalid parameter
**/
EFI_STATUS
EFIAPI
PchSbiExecution (
IN PCH_SBI_PID Pid,
IN UINT64 Offset,
IN PCH_SBI_OPCODE Opcode,
IN BOOLEAN Posted,
IN OUT UINT32 *Data32,
OUT UINT8 *Response
);
/**
Full function for executing PCH SBI message
Take care of that there is no lock protection when using SBI programming in both POST time and SMI.
It will clash with POST time SBI programming when SMI happen.
Programmer MUST do the save and restore opration while using the PchSbiExecution inside SMI
to prevent from racing condition.
This function will reveal P2SB and hide P2SB if it's originally hidden. If more than one SBI access
needed, it's better to unhide the P2SB before calling and hide it back after done.
When the return value is "EFI_SUCCESS", the "Response" do not need to be checked as it would have been
SBI_SUCCESS. If the return value is "EFI_DEVICE_ERROR", then this would provide additional information
when needed.
@param[in] Pid Port ID of the SBI message
@param[in] Offset Offset of the SBI message
@param[in] Opcode Opcode
@param[in] Posted Posted message
@param[in] Fbe First byte enable
@param[in] Bar Bar
@param[in] Fid Function ID
@param[in, out] Data32 Read/Write data
@param[out] Response Response
@retval EFI_SUCCESS Successfully completed.
@retval EFI_DEVICE_ERROR Transaction fail
@retval EFI_INVALID_PARAMETER Invalid parameter
**/
EFI_STATUS
EFIAPI
PchSbiExecutionEx (
IN PCH_SBI_PID Pid,
IN UINT64 Offset,
IN PCH_SBI_OPCODE Opcode,
IN BOOLEAN Posted,
IN UINT16 Fbe,
IN UINT16 Bar,
IN UINT16 Fid,
IN OUT UINT32 *Data32,
OUT UINT8 *Response
);
/**
This function saves all PCH SBI registers.
The save and restore operations must be done while using the PchSbiExecution inside SMM.
It prevents the racing condition of PchSbiExecution re-entry between POST and SMI.
Before using this function, make sure the P2SB is not hidden.
@param[in, out] PchSbiRegister Structure for saving the registers
@retval EFI_SUCCESS Successfully completed.
@retval EFI_DEVICE_ERROR Device is hidden.
**/
EFI_STATUS
EFIAPI
PchSbiRegisterSave (
IN OUT PCH_SBI_REGISTER_STRUCT *PchSbiRegister
);
/**
This function restores all PCH SBI registers
The save and restore operations must be done while using the PchSbiExecution inside SMM.
It prevents the racing condition of PchSbiExecution re-entry between POST and SMI.
Before using this function, make sure the P2SB is not hidden.
@param[in] PchSbiRegister Structure for restoring the registers
@retval EFI_SUCCESS Successfully completed.
@retval EFI_DEVICE_ERROR Device is hidden.
**/
EFI_STATUS
EFIAPI
PchSbiRegisterRestore (
IN PCH_SBI_REGISTER_STRUCT *PchSbiRegister
);
#endif // _PCH_SBI_ACCESS_LIB_H_

1
Silicon/CometlakevPkg/Library/FirmwareUpdateLib/FirmwareUpdateLib.inf
View File

@ -24,6 +24,7 @@
Silicon/CometlakevPkg/CometlakevPkg.dec
BootloaderCorePkg/BootloaderCorePkg.dec
BootloaderCommonPkg/BootloaderCommonPkg.dec
Silicon/CommonSocPkg/CommonSocPkg.dec
PayloadPkg/PayloadPkg.dec
[LibraryClasses]

156
Silicon/ElkhartlakePkg/Include/Library/PchSbiAccessLib.h
View File

@ -1,156 +0,0 @@
/** @file
Header file for PchSbiAccessLib.
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _PCH_SBI_ACCESS_LIB_H_
#define _PCH_SBI_ACCESS_LIB_H_
#include <Library/PchPcrLib.h>
/**
PCH SBI Register structure
**/
typedef struct {
UINT32 SbiAddr;
UINT32 SbiExtAddr;
UINT32 SbiData;
UINT16 SbiStat;
UINT16 SbiRid;
} PCH_SBI_REGISTER_STRUCT;
/**
PCH SBI opcode definitions
**/
typedef enum {
MemoryRead = 0x0,
MemoryWrite = 0x1,
PciConfigRead = 0x4,
PciConfigWrite = 0x5,
PrivateControlRead = 0x6,
PrivateControlWrite = 0x7,
GpioLockUnlock = 0x13
} PCH_SBI_OPCODE;
/**
PCH SBI response status definitions
**/
typedef enum {
SBI_SUCCESSFUL = 0,
SBI_UNSUCCESSFUL = 1,
SBI_POWERDOWN = 2,
SBI_MIXED = 3,
SBI_INVALID_RESPONSE
} PCH_SBI_RESPONSE;
/**
Execute PCH SBI message
Take care of that there is no lock protection when using SBI programming in both POST time and SMI.
It will clash with POST time SBI programming when SMI happen.
Programmer MUST do the save and restore opration while using the PchSbiExecution inside SMI
to prevent from racing condition.
This function will reveal P2SB and hide P2SB if it's originally hidden. If more than one SBI access
needed, it's better to unhide the P2SB before calling and hide it back after done.
When the return value is "EFI_SUCCESS", the "Response" do not need to be checked as it would have been
SBI_SUCCESS. If the return value is "EFI_DEVICE_ERROR", then this would provide additional information
when needed.
@param[in] Pid Port ID of the SBI message
@param[in] Offset Offset of the SBI message
@param[in] Opcode Opcode
@param[in] Posted Posted message
@param[in, out] Data32 Read/Write data
@param[out] Response Response
@retval EFI_SUCCESS Successfully completed.
@retval EFI_DEVICE_ERROR Transaction fail
@retval EFI_INVALID_PARAMETER Invalid parameter
**/
EFI_STATUS
EFIAPI
PchSbiExecution (
IN PCH_SBI_PID Pid,
IN UINT64 Offset,
IN PCH_SBI_OPCODE Opcode,
IN BOOLEAN Posted,
IN OUT UINT32 *Data32,
OUT UINT8 *Response
);
/**
Full function for executing PCH SBI message
Take care of that there is no lock protection when using SBI programming in both POST time and SMI.
It will clash with POST time SBI programming when SMI happen.
Programmer MUST do the save and restore opration while using the PchSbiExecution inside SMI
to prevent from racing condition.
This function will reveal P2SB and hide P2SB if it's originally hidden. If more than one SBI access
needed, it's better to unhide the P2SB before calling and hide it back after done.
When the return value is "EFI_SUCCESS", the "Response" do not need to be checked as it would have been
SBI_SUCCESS. If the return value is "EFI_DEVICE_ERROR", then this would provide additional information
when needed.
@param[in] Pid Port ID of the SBI message
@param[in] Offset Offset of the SBI message
@param[in] Opcode Opcode
@param[in] Posted Posted message
@param[in] Fbe First byte enable
@param[in] Bar Bar
@param[in] Fid Function ID
@param[in, out] Data32 Read/Write data
@param[out] Response Response
@retval EFI_SUCCESS Successfully completed.
@retval EFI_DEVICE_ERROR Transaction fail
@retval EFI_INVALID_PARAMETER Invalid parameter
**/
EFI_STATUS
EFIAPI
PchSbiExecutionEx (
IN PCH_SBI_PID Pid,
IN UINT64 Offset,
IN PCH_SBI_OPCODE Opcode,
IN BOOLEAN Posted,
IN UINT16 Fbe,
IN UINT16 Bar,
IN UINT16 Fid,
IN OUT UINT32 *Data32,
OUT UINT8 *Response
);
/**
This function saves all PCH SBI registers.
The save and restore operations must be done while using the PchSbiExecution inside SMM.
It prevents the racing condition of PchSbiExecution re-entry between POST and SMI.
Before using this function, make sure the P2SB is not hidden.
@param[in, out] PchSbiRegister Structure for saving the registers
@retval EFI_SUCCESS Successfully completed.
@retval EFI_DEVICE_ERROR Device is hidden.
**/
EFI_STATUS
EFIAPI
PchSbiRegisterSave (
IN OUT PCH_SBI_REGISTER_STRUCT *PchSbiRegister
);
/**
This function restores all PCH SBI registers
The save and restore operations must be done while using the PchSbiExecution inside SMM.
It prevents the racing condition of PchSbiExecution re-entry between POST and SMI.
Before using this function, make sure the P2SB is not hidden.
@param[in] PchSbiRegister Structure for restoring the registers
@retval EFI_SUCCESS Successfully completed.
@retval EFI_DEVICE_ERROR Device is hidden.
**/
EFI_STATUS
EFIAPI
PchSbiRegisterRestore (
IN PCH_SBI_REGISTER_STRUCT *PchSbiRegister
);
#endif // _PCH_SBI_ACCESS_LIB_H_

1
Silicon/ElkhartlakePkg/Library/FirmwareUpdateLib/FirmwareUpdateLib.inf
View File

@ -24,6 +24,7 @@
Silicon/ElkhartlakePkg/ElkhartlakePkg.dec
BootloaderCorePkg/BootloaderCorePkg.dec
BootloaderCommonPkg/BootloaderCommonPkg.dec
Silicon/CommonSocPkg/CommonSocPkg.dec
PayloadPkg/PayloadPkg.dec
[LibraryClasses]

2
Silicon/ElkhartlakePkg/Library/GpioSiLib/GpioSiLib.c
View File

@ -10,6 +10,8 @@
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Register/PchRegsPcr.h>
#include <PchReservedResources.h>
#include <Library/PchSbiAccessLib.h>
#include <Register/GpioRegs.h>
#include <Register/GpioRegsVer3.h>

125
Silicon/TigerlakePchPkg/Include/Library/PchSbiAccessLib.h
View File

@ -1,125 +0,0 @@
/** @file
Header file for PchSbiAccessLib.
Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _PCH_SBI_ACCESS_LIB_H_
#define _PCH_SBI_ACCESS_LIB_H_
#include <Library/PchPcrLib.h>
/**
PCH SBI Register structure
**/
typedef struct {
UINT32 SbiAddr;
UINT32 SbiExtAddr;
UINT32 SbiData;
UINT16 SbiStat;
UINT16 SbiRid;
} PCH_SBI_REGISTER_STRUCT;
/**
PCH SBI opcode definitions
**/
typedef enum {
MemoryRead = 0x0,
MemoryWrite = 0x1,
PciConfigRead = 0x4,
PciConfigWrite = 0x5,
PrivateControlRead = 0x6,
PrivateControlWrite = 0x7,
GpioLockUnlock = 0x13
} PCH_SBI_OPCODE;
/**
PCH SBI response status definitions
**/
typedef enum {
SBI_SUCCESSFUL = 0,
SBI_UNSUCCESSFUL = 1,
SBI_POWERDOWN = 2,
SBI_MIXED = 3,
SBI_INVALID_RESPONSE
} PCH_SBI_RESPONSE;
/**
Execute PCH SBI message
Take care of that there is no lock protection when using SBI programming in both POST time and SMI.
It will clash with POST time SBI programming when SMI happen.
Programmer MUST do the save and restore opration while using the PchSbiExecution inside SMI
to prevent from racing condition.
This function will reveal P2SB and hide P2SB if it's originally hidden. If more than one SBI access
needed, it's better to unhide the P2SB before calling and hide it back after done.
When the return value is "EFI_SUCCESS", the "Response" do not need to be checked as it would have been
SBI_SUCCESS. If the return value is "EFI_DEVICE_ERROR", then this would provide additional information
when needed.
@param[in] Pid Port ID of the SBI message
@param[in] Offset Offset of the SBI message
@param[in] Opcode Opcode
@param[in] Posted Posted message
@param[in, out] Data32 Read/Write data
@param[out] Response Response
@retval EFI_SUCCESS Successfully completed.
@retval EFI_DEVICE_ERROR Transaction fail
@retval EFI_INVALID_PARAMETER Invalid parameter
@retval EFI_TIMEOUT Timeout while waiting for response
**/
EFI_STATUS
EFIAPI
PchSbiExecution (
IN PCH_SBI_PID Pid,
IN UINT64 Offset,
IN PCH_SBI_OPCODE Opcode,
IN BOOLEAN Posted,
IN OUT UINT32 *Data32,
OUT UINT8 *Response
);
/**
Full function for executing PCH SBI message
Take care of that there is no lock protection when using SBI programming in both POST time and SMI.
It will clash with POST time SBI programming when SMI happen.
Programmer MUST do the save and restore opration while using the PchSbiExecution inside SMI
to prevent from racing condition.
This function will reveal P2SB and hide P2SB if it's originally hidden. If more than one SBI access
needed, it's better to unhide the P2SB before calling and hide it back after done.
When the return value is "EFI_SUCCESS", the "Response" do not need to be checked as it would have been
SBI_SUCCESS. If the return value is "EFI_DEVICE_ERROR", then this would provide additional information
when needed.
@param[in] Pid Port ID of the SBI message
@param[in] Offset Offset of the SBI message
@param[in] Opcode Opcode
@param[in] Posted Posted message
@param[in] Fbe First byte enable
@param[in] Bar Bar
@param[in] Fid Function ID
@param[in, out] Data32 Read/Write data
@param[out] Response Response
@retval EFI_SUCCESS Successfully completed.
@retval EFI_DEVICE_ERROR Transaction fail
@retval EFI_INVALID_PARAMETER Invalid parameter
@retval EFI_TIMEOUT Timeout while waiting for response
**/
EFI_STATUS
EFIAPI
PchSbiExecutionEx (
IN PCH_SBI_PID Pid,
IN UINT64 Offset,
IN PCH_SBI_OPCODE Opcode,
IN BOOLEAN Posted,
IN UINT16 Fbe,
IN UINT16 Bar,
IN UINT16 Fid,
IN OUT UINT32 *Data32,
OUT UINT8 *Response
);
#endif // _PCH_SBI_ACCESS_LIB_H_

1
Silicon/TigerlakePkg/Library/FirmwareUpdateLib/FirmwareUpdateLib.inf
View File

@ -25,6 +25,7 @@
Silicon/TigerlakePchPkg/TigerlakePchPkg.dec
BootloaderCorePkg/BootloaderCorePkg.dec
BootloaderCommonPkg/BootloaderCommonPkg.dec
Silicon/CommonSocPkg/CommonSocPkg.dec
PayloadPkg/PayloadPkg.dec
[LibraryClasses]