acrn-hypervisor/hypervisor/arch/x86/lib
Yonghua Huang b2c6cf7753 hv: refine retpoline speculation barriers
Per Section 4.4 Speculation Barriers, in
  "Retpoline: A Branch Target Inject Mitigation" white paper,
  "LFENCE instruction limits the speculative execution that
  a processor implementation can perform around the LFENCE,
  possibly impacting processor performance,but also creating
  a tool with which to mitigate speculative-execution
  side-channel attacks."

Tracked-On: #4424
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2020-02-26 09:24:54 +08:00
..
memory.c
retpoline-thunk.S hv: refine retpoline speculation barriers 2020-02-26 09:24:54 +08:00