Vijay Dhanraj b8a021d658 HV: split L2 and L3 cache resource MSR ... Upcoming intel platforms can support both L2 and L3 but our current code only supports either L2 or L3 CAT. So split the MSRs so that we can support allocation for both L2 and L3. This patch does the following, 1. splits programming of L2 and L3 cache resource based on the resource ID. 2. Replace generic platform_clos_array struct with resource specific struct in all the existing board.c files. Tracked-On: #3715 Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>		2020-02-27 10:44:07 +08:00
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boot	HV: init efi info with multiboot2	2020-02-26 09:24:16 +08:00
configs	HV: split L2 and L3 cache resource MSR	2020-02-27 10:44:07 +08:00
guest	HV: Rename cat.c/.h files to rdt.c/.h	2020-02-27 10:44:07 +08:00
lib	hv: refine retpoline speculation barriers	2020-02-26 09:24:54 +08:00
seed	HV: init and sanitize acrn multiboot info	2020-02-26 09:24:16 +08:00
Kconfig	HV: add multiboot2 header info	2020-02-26 09:24:16 +08:00
cpu.c	HV: Rename cat.c/.h files to rdt.c/.h	2020-02-27 10:44:07 +08:00
cpu_caps.c	hv:enable gpu iommu except APL platforms	2020-02-24 11:47:10 +08:00
cpu_state_tbl.c	HV: add board specific cpu state table to support Px Cx	2019-07-29 20:25:16 +08:00
e820.c	HV: init and sanitize acrn multiboot info	2020-02-26 09:24:16 +08:00
gdt.c	hv:cleanup header files for arch folder	2019-02-22 13:14:36 +08:00
idt.S	HV: Install a NMI handler in acrn IDT	2019-12-13 10:13:09 +08:00
init.c	HV: init and sanitize acrn multiboot info	2020-02-26 09:24:16 +08:00
ioapic.c	hv: rename the ACRN_DBG_XXX	2020-01-14 10:21:23 +08:00
irq.c	hv: rename BOOT_CPU_ID to BSP_CPU_ID	2020-02-25 09:08:14 +08:00
lapic.c	HV: clean up redundant macro in lapic.h	2019-12-27 12:27:08 +08:00
mmu.c	hv:refine 'uint64_t' string print format in comm moudle	2019-11-09 11:42:38 +08:00
notify.c	hv: fix pcpu_id mask issue in smp_call_function()	2020-01-17 09:20:53 +08:00
page.c	hv: ept: build 4KB page mapping in EPT for RTVM for MCE on PSC	2019-12-03 09:17:04 +08:00
pagetable.c	hv: rename the ACRN_DBG_XXX	2020-01-14 10:21:23 +08:00
pm.c	pm: S5: update the system shutdown logical in ACRN	2019-12-23 15:15:09 +08:00
rdt.c	HV: split L2 and L3 cache resource MSR	2020-02-27 10:44:07 +08:00
sched.S	hv: sched: rename schedule related structs and vars	2019-10-16 10:25:53 +08:00
security.c	hv: config: add an option to disable mce on psc workaround	2019-12-03 09:17:04 +08:00
sgx.c	hv: sgx: add basic support to init sgx resource for vm	2019-05-29 11:24:13 +08:00
timer.c	hv: rename BOOT_CPU_ID to BSP_CPU_ID	2020-02-25 09:08:14 +08:00
trampoline.c	hv: refine 'uint64_t' string print format in x86 moudle	2019-11-09 11:42:38 +08:00
vmx.c	hv:fix "no prototype for non-static function"	2019-07-09 10:36:03 +08:00
vtd.c	hv: vPCI: add assign/deassign PCI device HC APIs	2020-02-24 16:17:38 +08:00
wakeup.S	hv: pm: correct the function name	2019-09-11 17:30:24 +08:00