acrn-hypervisor/hypervisor/arch/x86/boot
Sainath Grandhi f01aad7e77 hv: Let trampoline execution use 1GB pages
ACRN currently uses 2MB large pages in the page tables setup
for trampoline code and data. This patch lets ACRN use 1GB large
pages instead.
When it comes to fixing symbols in trampoline code, fixing pointers
in PDPT is no more needed as PDPT PTEs contain Physical Address.

Tracked-On: #3899
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-10-28 13:44:32 +08:00
..
cpu_primary.S HV: Add prefix 'p' before 'cpu' to physical cpu related functions 2019-04-24 10:50:28 +08:00
cpu_save_boot_ctx.S modularization: boot component 2018-12-03 09:09:44 +08:00
trampoline.S hv: Let trampoline execution use 1GB pages 2019-10-28 13:44:32 +08:00