104 lines
3.7 KiB
C
104 lines
3.7 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef ASSIGN_H
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#define ASSIGN_H
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enum ptdev_intr_type {
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PTDEV_INTR_MSI,
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PTDEV_INTR_INTX,
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PTDEV_INTR_INV,
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};
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enum ptdev_vpin_source {
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PTDEV_VPIN_IOAPIC,
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PTDEV_VPIN_PIC,
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};
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/* entry per guest virt vector */
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struct ptdev_msi_info {
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uint32_t vmsi_addr; /* virt msi_addr */
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uint32_t vmsi_data; /* virt msi_data */
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uint16_t vmsi_ctl; /* virt msi_ctl */
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uint32_t pmsi_addr; /* phys msi_addr */
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uint32_t pmsi_data; /* phys msi_data */
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int msix; /* 0-MSI, 1-MSIX */
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int msix_entry_index; /* MSI: 0, MSIX: index of vector table*/
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int virt_vector;
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int phys_vector;
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};
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/* entry per guest vioapic pin */
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struct ptdev_intx_info {
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enum ptdev_vpin_source vpin_src;
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uint8_t virt_pin;
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uint8_t phys_pin;
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};
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/* entry per each allocated irq/vector
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* it represents a pass-thru device's remapping data entry which collecting
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* information related with its vm and msi/intx mapping & interaction nodes
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* with interrupt handler and softirq.
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*/
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struct ptdev_remapping_info {
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struct vm *vm;
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uint16_t virt_bdf; /* PCI bus:slot.func*/
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uint16_t phys_bdf; /* PCI bus:slot.func*/
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uint32_t active; /* 1=active, 0=inactive and to free*/
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enum ptdev_intr_type type;
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struct dev_handler_node *node;
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struct list_head softirq_node;
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struct list_head entry_node;
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union {
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struct ptdev_msi_info msi;
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struct ptdev_intx_info intx;
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} ptdev_intr_info;
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};
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void ptdev_intx_ack(struct vm *vm, int virt_pin,
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enum ptdev_vpin_source vpin_src);
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int ptdev_msix_remap(struct vm *vm, uint16_t virt_bdf,
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struct ptdev_msi_info *info);
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int ptdev_intx_pin_remap(struct vm *vm, struct ptdev_intx_info *info);
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void ptdev_softirq(int cpu);
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void ptdev_init(void);
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void ptdev_release_all_entries(struct vm *vm);
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int ptdev_add_intx_remapping(struct vm *vm, uint16_t virt_bdf,
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uint16_t phys_bdf, uint8_t virt_pin, uint8_t phys_pin, bool pic_pin);
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void ptdev_remove_intx_remapping(struct vm *vm, uint8_t virt_pin, bool pic_pin);
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int ptdev_add_msix_remapping(struct vm *vm, uint16_t virt_bdf,
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uint16_t phys_bdf, int vector_count);
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void ptdev_remove_msix_remapping(struct vm *vm, uint16_t virt_bdf,
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int vector_count);
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int get_ptdev_info(char *str, int str_max);
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#endif /* ASSIGN_H */
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