acrn-hypervisor/hypervisor
Junjie Mao 2266e133fb lapic: continuous LVT registers as an array
Pointer arithmetic is currently used to calculate the address of a specific
Local Vector Table (LVT) register (except LVT_CMCI) in lapic, since the
registers are continuously placed with fixed padding in between. However each of
these registers are declared as a single uint32_t in struct lapic, resulting
pointer arithmetic on a non-array pointer which violates MISRA C requirements.

This patch refactors struct lapic by converting the LVT registers fields (again
except LVT_CMCI) to an array named lvt. The LVT indices are reordered to reflect
the order of the LVT registers on hardware, and reused to index this lvt array.

The code before and after the changes is semantically equivalent.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 13:52:11 +08:00
..
.travis-dockerfiles Add 'findutils' to Fedora-based Docker images 2018-05-15 17:25:26 +08:00
Documentation UEFI: update acrn.conf and Document 2018-05-15 17:25:26 +08:00
arch/x86 lapic: continuous LVT registers as an array 2018-05-30 13:52:11 +08:00
boot HV: further cleanup of header inclusions 2018-05-25 10:45:56 +08:00
bsp hv: handle the case of empty hypervisor cmdline 2018-05-28 17:36:54 +08:00
common exception: use func vcpu_queue_exception to inject exception 2018-05-30 13:51:49 +08:00
debug HV: further cleanup of header inclusions 2018-05-25 10:45:56 +08:00
include lapic: continuous LVT registers as an array 2018-05-30 13:52:11 +08:00
lib HV: further cleanup of header inclusions 2018-05-25 10:45:56 +08:00
.travis.yml Travis CI: enable Ubuntu 16.04 and Fedora 26 testing 2018-05-15 17:25:24 +08:00
MAINTAINERS update home page information 2018-05-15 17:19:39 +08:00
Makefile hypervisor: install acrn.32.out to /usr/lib/acrn/acrn.sbl 2018-05-24 19:34:49 +08:00
README.rst initial import 2018-05-11 14:44:28 +08:00

README.rst

Embedded-Hypervisor
###################

This open source embedded hypervisor defines a software architecture for
running multiple software subsystems managed securely on a consolidated
system (by means of a virtual machine manager), and defines a reference
framework Device Model implementation for devices emulation

This embedded hypervisor is type-1 reference hypervisor, running
directly on the system hardware. It can be used for building software
defined cockpit (SDC) or In-Vehicle Experience (IVE) solutions running
on Intel Architecture Apollo Lake platforms. As a reference
implementation, it provides the basis for embedded hypervisor vendors to
build solutions with an open source reference I/O mediation solution,
and provides auto makers a reference software stack for SDC usage.

This embedded hypervisor is able to support both Linux* and Android* as
a Guest OS, managed by the hypervisor, where applications can run.

This embedded hypervisor is a partitioning hypervisor reference stack,
also suitable for non-automotive IoT & embedded device solutions. It
will be addressing the gap that currently exists between datacenter
hypervisors, hard partitioning hypervisors, and select industrial
applications.  Extending the scope of this open source embedded
hypervisor relies on the involvement of community developers like you!