commit 873ed752d ("misc: sanity check VM config for nested virtualization")
requires that the guest_flag tag can't be empty, or it will fail to build.
This patch changes all instances of "<guest_flag></guest_flag>"
to "<guest_flag>0</guest_flag>".
Tracked-On: #5923
Signed-off-by: Zide Chen <zide.chen@intel.com>
'psram' and 'PSRAM' are legacy names and replaced
with 'ssram' and 'SSRAM' respectively.
Tracked-On: #6012
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Shuang Zheng <shuang.zheng@intel.com>
This patch introduces the XML schema `datachecks.xsd` which is the central
place to specify and check assumptions on board characteristics and
scenario settings. Each assumption is expressed as an XSD assertion with
annotation of error severity (e.g. info, warning or error) and detailed
descriptions.
At compile time, the board and scenario XMLs are combined (by putting the
children of the root node together) can checked against the
schema. Assertion failures are categorized according to the defined
severity. Currently only errors will block compilation by outputing the
descriptions of the violated assertions.
The objective of this patch is the introduce the framework to document,
manage and check assumptions. A better way to present assumption violations
to end users (either on the command line or in the configuration editor) is
out of the scope of this series and will be considered in the future.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch extracts information on devices and put them under the
`/acrn-config/devices` node in the board XML.
The generated XML looks like the following:
<devices>
<bus type="system">
<acpi_object>\_SB_</acpi_object>
<bus id="PNP0A08" type="pci" address="0x0" description="...">
<vendor>0x8086</vendor>
<identifier>0x591f</identifier>
<subsystem_vendor>0x1028</subsystem_vendor>
<subsystem_identifier>0x07a1</subsystem_identifier>
<class>0x060000</class>
<acpi_object>\_SB_.PCI0</acpi_object>
<resource type="bus_number" min="0x0" max="0x3e" len="0x3f"/>
<resource type="io_port" min="0x0" max="0xcf7" len="0xcf8"/>
<resource type="io_port" min="0xcf8" max="0xcf8" len="0x8"/>
<resource type="io_port" min="0xd00" max="0xffff" len="0xf300"/>
<resource type="memory" min="0x10000" max="0x1ffff" len="0x0"/>
<resource type="memory" min="0xa0000" max="0xbffff" len="0x20000"/>
<resource type="memory" min="0xc0000" max="0xc3fff" len="0x4000"/>
<resource type="memory" min="0xc4000" max="0xc7fff" len="0x4000"/>
...
<capability id="vendor_specific"/>
<device address="0x1"> ... </device>
...
<bus>
<bus>
<device> ... <device>
<devices>
The hierarchy of devices are based on the hierarchy of device objects in
the ACPI namespace (which is established by interpreting the ACPI DSDT and
SSDT tables). Typically most device objects are under the predefined
`_SB_` (i.e. System Bus) object under which an object representing the PCI
root complex (`\_SB_.PCI0` in the example above) can be found. The PCI
devices attached to bus 0 are listed as children of the PCI root complex
node.
For each bus or device, the board inspector tries best to parse the
information from both ACPI device objects and PCI configuration space to
extract the following:
- the model (via `_HID` object and PCI vendor ID, device ID and class code),
- assigned resources (via `_CRS` object and PCI BARs),
- capabilities (via the PCI capability list)
v1 -> v2:
- Fix references to undeclared modules or variables.
- Make the ACPI extractor advanced and not enabled by default.
- Extract the secondary I/O and memory-mapped I/O addresses of bridges.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch extracts information on mapping of available RAM and put them
under the `/acrn-config/memory` node in the board XML. Each range of
available RAM is represented by its start (host physical) address, end
address and size (in byte).
The following is an example of the generated XML.
<memory>
<range start="0x0000000000000000" end="0x0000000000057fff" size="360448"/>
<range start="0x0000000000059000" end="0x000000000009dfff" size="282624"/>
<range start="0x0000000000100000" end="0x00000000c9ff9fff"
size="3387924480"/>
<range start="0x00000000c9ffc000" end="0x00000000d984afff"
size="260370432"/>
<range start="0x00000000dbdff000" end="0x00000000dbdfffff" size="4096"/>
<range start="0x0000000100000000" end="0x000000041dffffff"
size="13388218368"/>
</memory>
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch extracts information on cache topology and capabilities and put
them under the `/acrn-config/caches` node in the board XML in the following
manner.
<caches>
<cache level="1" id="0x0" type="1">
<cache_size>32768</cache_size>
<line_size>64</line_size>
<ways>8</ways>
<sets>64</sets>
<partitions>1</partitions>
<self_initializing>1</self_initializing>
<fully_associative>0</fully_associative>
<write_back_invalidate>0</write_back_invalidate>
<cache_inclusiveness>0</cache_inclusiveness>
<complex_cache_indexing>0</complex_cache_indexing>
<processors>
<processor>0x0</processor>
<processor>0x1</processor>
</processors>
</cache>
<cache level="1" id="0x0" type="2"> ... </cache>
<cache level="1" id="0x1" type="1"> ... </cache>
<cache level="1" id="0x1" type="2"> ... </cache>
...
<cache level="2" id="0x0" type="3"> ... </cache>
<cache level="2" id="0x1" type="3"> ... </cache>
...
<cache level="3" id="0x0" type="3"> ... </cache>
</caches>
Each cache block is represented by a separate `cache` node identified by
its level, cache ID and type (as reported by CPUID). More information, such
as the size, characteristics and capabilities, are attached as children of
the node.
The current implementation fetches cache information solely from the CPUID
leaf 4H. In the future more cache-related information, such as those in the
ACPI RTCT tables, will be appended here.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch extracts information on CPU topology and capability and put them
under the `/acrn-config/processors` node in the board XML.
The added information can be divided into two categories.
1. The topology of CPUs like the following. Each thread (which is a leaf
node in the topology) contains its addresses (i.e. CPU ID, APIC ID,
x2APIC ID) and model identifiers (i.e. family, model, stepping IDs, core
types and native model ID).
<die id="0">
<core id="0x0">
<thread id="0x0">
<cpu_id>0</cpu_id>
<apic_id>0x0</apic_id>
<x2apic_id>0x0</x2apic_id>
<family_id>0x6</family_id>
<model_id>0x9e</model_id>
<stepping_id>0x9</stepping_id>
<core_type></core_type>
<native_model_id></native_model_id>
</thread>
<thread id="0x1"> ... </thread>
</core>
<core id="0x1">
<thread id="0x2"> ... </thread>
<thread id="0x3"> ... </thread>
</core>
<core id="0x2">
<thread id="0x4"> ... </thread>
<thread id="0x5"> ... </thread>
</core>
<core id="0x3">
<thread id="0x6"> ... </thread>
<thread id="0x7"> ... </thread>
</core>
</die>
2. The CPU models identified by the quadruple (family_id, model_id,
core_type, native_model_id). Each model is described by its brandstring
and capabilities, both of which are fetched from CPUID leaves.
<model description="Intel(R) Core(TM) i7-7700 CPU @ 3.60GHz">
<family_id>0x6</family_id>
<model_id>0x9e</model_id>
<core_type></core_type>
<native_model_id></native_model_id>
<capability id="sse3"/>
<capability id="pclmulqdq"/>
<capability id="dtes64"/>
<capability id="monitor"/>
...
</model>
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch makes the `run.py` enumerate and invoke all extractors (whose
name should be `##-<name>.py` where `##` is a decimal number for ordering)
under the extractors/ directory. Only some helper subroutines are added in
this patch; the actual extractors will be added in the subsequent patches
in this series.
v1 -> v2:
- Allow an extractor to be classified as advanced by defining the variable
`advanced` to True. Advanced extractors are not enabled by default and
can be invoked by passing `--advanced` to the board inspector.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds a parser of SMBIOS tables. The tables are fetched from
/sys/firmware/dmi/tables on target board. The parser comes from
BITS (https://biosbits.org/) without modifications, except how the raw
SMBIOS tables are read.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds a parser of PCI-compatible configuration space read from
sysfs. The headers and capability lists are fully parsed, but only a couple
of capabilities are parsed completely. Parsing of additional capabilities
will be added on an on-demand basis.
v1 -> v2:
- Fix a typo that causes incorrect parsing of BAR types
- Parse capability structures using from_buffer_copy instead of
from_address
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds a parser and interpreter of ACPI DSDT/SSDT tables in
AML (ACPI Machine Language) in order to understand the complete device
layout and resource allocation.
Kindly note that the interpreter is still experimental and not yet
complete.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds a parser of the physical E820 memory maps fetched from
/sys/firmware/memmap.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds a parser of CPU identification information reported by the
CPUID instruction.
The framework is based on the CPUID parsing facilities in
BITS (https://biosbits.org/), but with the following changes.
1. The CPUID data is fetched by executing the `cpuid` utility, rather than
executing the `cpuid` instruction. This avoids introducing any
additional library or Python/C extension and gets a CPUID leaf on all
physical cores in one shot.
2. Parsers of CPUID leaves 0x10, 0x1A and 0x1F are added. New fields in
existing leaves are also added.
3. A wrapper function, named `parse_cpuid`, is added as the single API that
allows other modules to get an arbitrary CPUID leaf or subleaf.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Starting from Python 3.0 the following changes to the language are
effective:
1. The integer types `int` and `long` have been unified as `int`. See
`https://www.python.org/dev/peps/pep-0237/` for details.
2. The `.iterkeys` method is removed from the `dict` class. See
`https://www.python.org/dev/peps/pep-3106/` for details.
This patch updates `unpack.py`, originally from BITS, so that it can be
used in Python 3.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch reorganize the files of the board inspector as follows.
1. Rename the directory name from `target` to `board_inspector`, in order to
align with the name used in ACRN documentation.
2. Move the scripts that generate the current board XML into the `legacy`
sub-directory. The legacy nodes will be removed after transitioning to the
new board XML schema completely,
3. Add the main script `cli.py` which is the command line interface of the board
inspector.
v1 -> v2:
- Rename `run.py` to `cli.py`.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The ivshmem region name format is not ristricted to start with "hv".
Loosen the schema validation so that the region name can start with "hv" or "dm".
Tracked-On: #6009
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
- SOS does not allow LAPIC passthru unless nested virtualization is
enabled on SOS.
- Currently nested virtualization requires LAPIC passthru, so if
GUEST_FLAG_VMX_ENABLED is set, GUEST_FLAG_LAPIC_PASSTHROUGH must be
set in same VM.
- Per VM GUEST_FLAG_VMX_ENABLED can be set only if CONFIG_VMX_ENABLED
is set.
Tracked-On: #5923
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
NVMX_ENABLED: ACRN is built to support nested virtualization if set.
GUEST_FLAG_NVMX_ENABLED: indicates that the VMX capability can be present
in this guest to run nested VMs.
Tracked-On: #5923
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
The xml schema validator would fail the build if RDT_ENABLED is set to ‘y’
in scenario file, saying that "'RDT' Unexpected child with tag 'MBA_DELAY'"
Tracked-On: #5917
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
The macro definition SOS_VM_BOOTARGS in vm_configurations.h calls
macros SOS_ROOTFS, SOS_CONSOLE and SOS_BOOTARGS_DIFF which is defined in
misc_cfg.h and parsed from scenario.xmls.
Add a whitespace in the end of the argument macros to prevent arguments
are concatenated in a single line.
Tracked-On: #5998
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
ehl-crb-b
enable CDP_ENABLED for RT in scenarios, enable ivshmem for industry
scenario, disable vuart0 in launch settings, passthru SATA for RTVM,
set virtio-net and virtio-blk for post-launched WaaG and YaaGs.
Tracked-On: #5955
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
Instead of "#include <x86/foo.h>", use "#include <asm/foo.h>".
In other words, we are adopting the same practice in Linux kernel.
Tracked-On: #5920
Signed-off-by: Liang Yi <yi.liang@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Add comma to the last member of ivshmem pci devices.
If the last element ends without comma, the clang-format would attach
the brackets to the first and last lines.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add a xslt file "misc_cfg.h.xsl". This file is used to
generate misc_cfg.h which is used by hypervisor.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add a xslt file "ivshemem_cfg.h.xsl". This file is used to
generate ivshemem_cfg.h which is used by hypervisor.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add a xslt file "pt_intx.c.xsl". This file is used to
generate pt_intx.c which is used by hypervisor.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add a xslt file "vm_configurations.h.xsl". This file is used to
generate vm_configurations.h which is used by hypervisor.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add a xslt file "vm_configurations.c.xsl". This file is used to
generate vm_configurations.c which is used by hypervisor.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
This file allocates the resource of pio base.
The available pio base is in ['0x3F8', '0x2F8', '0x3E8', '0x2E8'] and it
cannot be used by native device.
When any of sos legacy vuarts are enabled, assign a pio base to legancy
vuarts' base.
The allocator follows rules:
1. An SOS legacy vuart only support PIO vuart.
2. To assign a pio base for sos legacy vuart 0:
- If the hv/DEBUG_OPTIONS/SERIAL_CONSOLE is one of
[ttys0, ttys1, ttys2, ttys3] and it's a pio vuart in the native
environment, the pio base of SOS legacy vuart 0 would be the same as
native one.
- If the hv/DEBUG_OPTIONS/SERIAL_CONSOLE is not one of
[ttys0, ttys1, ttys2, ttys3], assigns a pio base to SOS legacy vuart 0
from avilable pio base.
- If the hv/DEBUG_OPTIONS/SERIAL_CONSOLE is not one of
[ttys0, ttys1, ttys2, ttys3] but a pio vuart, will assigns a pio
base to SOS legacy vuart 0 from avilable pio base and raise a
warning to user.
3. To assign a pio base for sos legacy vuart 1:
- Assigns a pio base to SOS legacy vuart 1 from avilable pio base.
- If all the available pio bases list is empty (which means all are
in used by native), it assigns one of the pio base to SOS legacy
vuart 1 anyway, but raise a warning to user.
4. Assigned pio bases must be unique.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Create an intx.py which is a static allocator to allocate the irq
resources. The available irq list is based on the native irqs which
are in range [0, 15] and are not used by native os.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
If a cpu_affinity node of SOS is not present in the scenario.xml,
assign the native cpus which are not assigned to pre-launched vm to
SOS vm.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Refine the "append_node" which can add new node with an attribute and
return the appended node.
The method "get_node" finds the xpath value and return it if there is an
unique node exists, otherwise it returns None.
It is used to get an xpath element node or can determine the xpath existence.
The "get_text" is replaced with "get_node". The only get_text in
hv_ram.py is modified accordingly.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add lib.xsl under config_tools/xforms.
This lib.xsl contains the variables and customized functions for
xslt transformation.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Create lib.py which contains the common methods that are shared by static
allocators under misc/config_tools/static_allocators.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Create a file which contains user-defined errors for config-tools.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
<guest_flag/> may be treated as either empty string or null in xslt
transformation and xsd schema validation. Replace it with:
<guest_flag></guest_flag>
to avoid the undefined behavior.
The duplicate guest_flag are removed.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
add 2 * max (IVSHMEM_SHM_SIZE, 2M) in HV_RAM_SIZE calculation to
avoid ram overflow caused by additional memory usage for shared
memory alignment.
Tracked-On: #5955
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
fail to create kata vm type in industry scenario due to
the default vm id value is 1. Meanwhile set the max user
vm to 7 in tgl-rvp industry xml.
Tracked-On: #5932
Signed-off-by: lirui34 <ruix.li@intel.com>
There is no audio device in the default ehl-crb-b.xml, so remove
passthru audio devices from launch xmls on ehl-crb-b.
Tracked-On: #5925
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
remove UOS_RAM_SIZE and SOS_RAM_SIZE in scenario config since these
two config elements are useless.
Tracked-On: #5927
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
update HV_RAM_SIZE calculation algorithm to 20MB + VM number*
16MB, which consists of text segment rodata(2MB), bss data(about
1MB), bss.ppt_pages(2.4MB), bss.ctx_tables(6MB), bss.vm_array(
3.2MB), bss.ivshmem_base(2MB+1.8MB for alignment) and
bss.post_uos_sworld_memory(16MB*post-launched VM number).
Tracked-On: #5927
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
Refine the logic of finding unused bdf for SOS ivshmem devices. First,
find the unused bdf based on if the "dev" is unused. Increase the "func"
for the next same type of emulated devices if the last assigned bdf
exists. Otherwise, start over looking for unused bdf based on "dev"
repeatedly.
Tracked-On: #5869
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Do not build (or install) the ACRN life_mngr by default as this is
a User VM tool, not one to be used and run in the Service VM.
The component can still be built independantly by invoking
'make -C misc life_mngr' (components will be built and placed in
'misc/build/services/' by default).
Tracked-On: #5660
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
A scenario can enable multiple IVSHMEM_REGIONs, loosen the restriction
to extend multiple regions support.
Tracked-On: #5863
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
The creation of the acrn_manager ('acrnctl') configuration folder
is currently done when adding a new VM to the system. This leads to
an error (non-fatal) thrown on the terminal is calling, say 'list'
first without having added a VM yet. This patch moves the creation
of such folder as part of main() thereby ensuring it is created as
soon as the program starts.
Tracked-On: #4898
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Zide Chen