Commit Graph

26 Commits

Author SHA1 Message Date
Ziheng Li eb8bcb06b3 Update copyright year range in code headers
Modified the copyright year range in code, and corrected "int32_tel"
into "Intel" in two "hypervisor/include/debug/profiling.h" and
"hypervisor/include/debug/profiling_internal.h".

Tracked-On: #7559
Signed-off-by: Ziheng Li <ziheng.li@intel.com>
2022-07-15 11:48:35 +08:00
Geoffroy Van Cutsem 8b16be9185 Remove "All rights reserved" string headers
Many of the license and Intel copyright headers include the "All rights
reserved" string. It is not relevant in the context of the BSD-3-Clause
license that the code is released under. This patch removes those strings
throughout the code (hypervisor, devicemodel and misc).

Tracked-On: #7254
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2022-04-06 13:21:02 +08:00
Chenli Wei 93ede38169 dm: remove some dynamic parameters from acrn-dm usage
The following parameters have not used by new design:

1.  --vsbl <vsbl_file_path>
2.  --part_info <part_info_name>
3.  -G, --gvtargs <GVT_args>
4.  -s <slot>,pci-gvt
5.  -Y, --mptgen
6.  -s <slot>,virtio-hdcp
7.  -s <slot>,npk
8.  -s <slot>,virtio-coreu
9.  -i, --ioc_node <ioc_mediator_parameters>
10. --pm_by_vuart [pty|tty],<node_path>
11. --pm_notify_channel <channel>

This patch remove these parameters from usage and comment in code to
explain they are all obsoleted now.

Tracked-On: #6690
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
Signed-off-by: Chenli Wei <chenli.wei@linux.intel.com>
2021-12-29 14:25:50 +08:00
Tao Yuhong 8ed1d8aa5e DM: change high RAM start address to 4GB for post-launched VM
ACRN didn't support dynamic memory allocation. SO it would reserve
a big page pool and use the GPA as index to get a page to do EPT
mapping. In order to save memory, we put high MMIO windows to [4G, 5G].
AFter we support dynamic page allocation for EPT mapping, we move
high MMIO windows to where it used to ([256G, 512G]) for 39 bits physical
address), we could move high memory to where is used to too ([4G, 4G +
size]).

Tracked-On: #5913
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
2021-05-07 14:16:37 +08:00
ppsun 2a96c567b8 DM: gvt: Identical mapping for GPU DSM refine to support EHL/TGL
Windows graphic driver obtains DSM address from in-BAR mmio register
which has passthroughed. Not like the other platforms obtained from
pci configure space register which has virtualized. GPU GuC must use
WOPCM in DSM, besides, Windows OS wants to manage DSM also. These two
reason force acrn has to keep identical mapping to avoid trap mmio
BAR to do the emulation.

Tracked-On: #5880
Signed-off-by: Peng Sun <peng.p.sun@intel.com>
2021-04-07 13:50:48 +08:00
Peter Fang 3d99082411 dm: support OVMF split images
In addition to a single OVMF image (OVMF.fd), split images
(OVMF_CODE.fd, OVMF_VARS.fd) can be used to facilitate VM management.

From the OVMF Whitepaper:

  The variable store and the firmware executable are also available in
  the build output as separate files entitled: "OVMF_VARS.fd" and
  "OVMF_CODE.fd". This enables central management and updates of the
  firmware executable, while each virtual machine can retain its own
  variable store.

An example to launch acrn-dm with the split images:

  --ovmf code=/usr/share/acrn/bios/OVMF_CODE.fd, \
  vars=/usr/share/acrn/bios/OVMF_VARS.fd

v1 -> v2:
- use memory-mapped file I/O for writeback
- use fcntl to lock OVMF image files

Tracked-On: #5487
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2020-11-11 09:53:28 +08:00
Sun Peng 73f21a41ad DM: gvt: Identical mapping for GPU DSM
Windows graphic driver obtains DSM address from in-BAR mmio register
which has passthroughed. Not like the other platforms obtained from
pci configure space register which has virtualized. So TGL has to
keep identical mapping to avoid trap mmio BAR to do the emulation.

To keep simple, this patch hardcode the TGL DSM region in vE820
table, this will cause memory waste here. In the near future, we
need refine the entire vE820 logic as it is hard to maintained
due to many reserved regions have introduced in recently.

Signed-off-by: Sun Peng <peng.p.sun@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
Tracked-On: #5461
2020-11-04 11:24:49 +08:00
Qian Wang 46afb946da DM: modify vE820 to adapt to pSRAM
dm: modify vE820 to adapt to pSRAM for post-launched RTVM

When pSRAM is enabled for post-launched RTVM, we add a segment in vE820 for
pSRAM, and therefore the lowmem RAM will be split into part1 and part2.
Also, code of post vE820 initialization is refined

Tracked-On: #5330
Signed-off-by: Qian Wang <qian1.wang@intel.com>
2020-11-02 15:56:30 +08:00
Li Fei1 460124f984 dm: e820: refine e820 layout
We don't reserve PCI MMIO in e820 Table, it's included in DSDT ACPI Table.
About 0xA0000 - 0x100000 entry, we don't have any ACPI Table touch this region.
So we could remove it too.

After this change, we could only pass the reserved e820 table which we must
reserve to OVMF. In this case, the OVMF could trust ACRN-DM and pass the
reserved e820 table to guest instead of dropping it.

This patch needs the corresponding modify in OVMF. Otherwise, the guest could
not boot.

Tracked-On: #4550
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2020-10-30 15:45:31 +08:00
Junming Liu f9f64d356f dm:reserve 64M hole for graphics stolen memory in e820 table
Add 64M@0xDB000000 for GVT-d usage as below.
Currently, use 64M for graphics stolen memory,
gop driver and uos IGD driver will use this memory region.

start 	      end          size     Note
[0x 00000000, 0x 000A0000] 640K
[0x 000A0000, 0x 00100000] 384K
[0x 00100000, 0x 7ff00000] 2G-1M    lowmem-1M
[0x 80000000, 0x 88000000] 128M     [lowmem, +128M]
[0x DB000000, 0x DF000000] 64MB     graphics stolen memory for GVT-d
[0x DF000000, 0x E0000000] 16M 	    gvt
[0x e0000000, 0x100000000] 512M
[0x100000000, 0x140000000] 1G

Tracked-On: #4360

Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Liu XinYun <xinyun.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Wu Binbin <binbin.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2020-01-17 09:23:13 +08:00
Liu Xinyun 639c698626 dm: reserve 16M hole for gvt in e820 table
Add 16M@0xDF000000 for GVT usage as below. Currently, use 8M for GOP
framebuf, it satisfies display resolution of 1920x1080@32bpp

start         end          size    Note
[0x 00000000, 0x 000A0000] 640K
[0x 000A0000, 0x 00100000] 384K
[0x 00100000, 0x 7ff00000] 2G-1M   lowmem-1M
[0x 80000000, 0x 88000000] 128M    [lowmem, +128M]
[0x DF000000, 0x E0000000] 16M     *gvt*
[0x e0000000, 0x100000000] 512M
[0x100000000, 0x140000000] 1G

*gvt*:
[0xDF000000, 0xDF800000] 8M      GOP FB
[0xDFFFD000, 0XE0000000] 12K     opregion

Tracked-On: #3624

Signed-off-by: Liu Xinyun <xinyun.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-09-10 09:50:39 +08:00
huihuang.shi f147c388a5 hv: fix Violations touched ACRN Coding Guidelines
fix violations touched below:
1.Cast operation on a constant value
2.signed/unsigned implicity conversion
3.return value unused.

V1->V2:
1.bitmap api will return boolean type, not need to check "!= 0", deleted.
2.The behaves ~(uint32_t)X and (uint32_t)~X are not defined in ACRN hypervisor Coding Guidelines,
removed the change of it.
Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2019-08-15 09:47:11 +08:00
Yang, Yu-chu 16a7d2522c DM: ovmf NV storage writeback support
To support modification of OVMF NV storage, add an option "w" for
--ovmf to write the changed OVMF NV data section back to the OVMF image
from guest memory before deinit operations. This will enable persistent
EFI variables. Only option "w" is supported, dm will exit if passing
invalid option. It expects OVMF NV storage writeback with option "w"
when power off or reboot the UOS, poweroff, cold and warm reboot in EFI
shell and when dm recieves SIGINT and SIGHUP.

Tracked-On: #3413
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Reviewed-by:Eddie Dong <eddie.dong@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
2019-07-22 11:18:47 +08:00
Binbin Wu a3073175a6 dm: e820: reserve memory range for EPC resource
Reserved 128MB memory range for EPC resource in E820 table, starting
from 0x80000000.
Need to align the base address b/t DM and HV.
For hypervisor, the base address will be specified in epc field in
vm_configurations.c

Tracked-On: #3179
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-05-29 11:24:13 +08:00
Vijay Dhanraj f010f99d67 DM: Decouple and increase kernel boot args length
Currently, we use STR_LEN for all checking the size of all the
acrn-dm parameters. But some parameters like kernel boot args
can grow based on different needs. For example, when kata launches
guest VM using acrn, the kernel boot args increases by 256 bytes
(i.e 1024 +256).

Just increasing STR_LEN will unnecessarily increase allocations
for other acrn-dm parameters. So decoupling only boot_args
length and increasing it to 2048.

PS: If other parameters like ramdisk path, kernel path,
elf_path etc. don't need 1024 bytes, we can reduce STR_LEN
to 256 or 512 bytes.

Tracked-On: #3138
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-05-27 12:13:51 +08:00
Peter Fang 4dd1331072 dm: remove empty UOS E820 entries
While building the E820 map for UOS, [lowmem, lowmem_limit) and [5GB,
highmem) can be empty. Remove the empty entries if they appear.

Tracked-On: #2792
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
2019-03-21 10:28:17 +08:00
Jian Jun Chen 29b1ebcd43 dm: add support of high MMIO mapping
1G PCI hole is added just after 4G address which is used as the
PCI high MMIO address space. Guest high memory is mapped from 5G
address for both EPT and device model user space address. Guest
e820 table and API vm_map_gpa are updated accordingly.

Tracked-On: #2577
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-02-28 18:33:11 +08:00
Peter Fang d8c4e7d367 dm: add option to boot OVMF from acrn-dm
Use '--ovmf <OVMF image location>' when launching acrn-dm.

Tracked-On: #1832
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-13 09:56:09 +08:00
Peter Fang 653a57958b dm: query and save image size during initial checking
This is preparation for the upcoming High BIOS work.

Tracked-On: #1832
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-13 09:56:09 +08:00
Yin Fengwei 9f7642648b dm: add elf loader to dm
This patch adds a simple 32bit static elf binary loader to acrn DM.
And if the elf binary follow multiboot protocol, only memory info
will be included in multiboot info.

Tracked-On: #1465
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2018-10-17 14:32:33 +08:00
Peter Fang 1657544152 dm: vrtc: add memory configuration in RTC CMOS
Some firmware (e.g. UEFI) uses RTC CMOS to fetch the system's memory
configuration. Put lowmem / highmem info in the designated area.

This is a port of Bhyve vRTC's user-space logic.

v1 -> v2:
* move KB/MB/GB to macros.h
* move nvram offset definitions to rtc.h

Tracked-On: #1390
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-05 00:33:17 +08:00
Yin Fengwei d3a640da92 DM: add add_e820_entry to update e820 table.
For vSBL boot path, we need to mark the memory vSBL is using
as reserved in e820 table. The add_e820_entry is added to
update the e820 table dynamically.

To simplify the code logic, we assume:
  - vSBL is put the middle of one entry of default e820 table
  - That entry has orignal RAM type in e820 table
  - The e820 table has enough space to hold two more new entries.

If there is more complicated case in the future, we could extend
add_e820_entry to handle it.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-05-15 17:25:26 +08:00
Yin Fengwei 223efeb986 DM: Update the default e820 table to reserve 0xF0000~0x100000
The region of MPtable/ACPI table/SMBios resides in
0xF0000 ~ 0x100000. They should be marked as RESERVED instead of
RAM type in e820 table.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-05-15 17:25:26 +08:00
Yin Fengwei 53b89b91de DM: add long option to specify guest partition info file
Some guests needs guest partition info passed to support
A/B boot. DM needs to load guest partition info from file
and pass to vsbl.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-05-15 17:19:38 +08:00
Yin Fengwei 446297f96d DM: sw_load: sw_load function name update
To align with file name, acrn_sw_load_direct() is changed
to acrn_sw_load_bzimage().

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-05-15 17:19:38 +08:00
Yin Fengwei 6ee72d7df9 DM: split sw_load.c to sw_load.c and sw_load_direct.c
The common loader code is put to sw_load_common.c
The loader code for directly kernel loading is put to sw_load_bzimage.c
The further change for SBL will be put to sw_load_sbl.c

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2018-05-15 17:19:38 +08:00