Commit Graph

264 Commits

Author SHA1 Message Date
Yonghua Huang 2e62ad9574 hv[v2]: remove registration of default port IO and MMIO handlers
- The default behaviors of PIO & MMIO handlers are same
   for all VMs, no need to expose dedicated APIs to register
   default hanlders for SOS and prelaunched VM.

Tracked-On: #3904
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2019-10-24 13:21:19 +08:00
Yonghua Huang 82a0d39e84 hv:fix reference to uninitialized variable in vmsi_remap()
'info.pmsi_addr' may be written to physicall device's
  PCI configuration field without initialization when
  'enable' is false in 'vmsi_remap()'.
  this patch is to fix above issues, 'PCIR_MSI_ADDR'
  and 'PCIR_MSI_ADDR_HIGH' only be programmed when
  'enable' is true.

Tracked-On: #3903
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2019-10-24 11:42:59 +08:00
Shuo A Liu 891e46453d hv: sched: move pcpu_id from acrn_vcpu to thread_object
With cpu sharing enabled, we will map acrn_vcpu to thread_object
in scheduling. From modulization perspective, we'd better hide the
pcpu_id in acrn_vcpu and move it to thread_object.

Tracked-On: #3813
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Signed-off-by: Yu Wang <yu1.wang@intel.com>
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-10-23 12:47:08 +08:00
Mingqiang Chi de0a5a48d6 hv:remove some unnecessary includes
--remove unnecessary includes
--remove unnecssary forward-declaration for 'struct vhm_request'

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-10-15 14:40:39 +08:00
Li, Fei1 0dac373d93 hv: vpci: remove pci_msi_cap in pci_pdev
The MSI Message Address and Message Data have no valid data after Power-ON. So
there's no need to initialize them by reading the data from physical PCI configuration
space.

Tracked-On: #3475
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-10-14 15:09:03 +08:00
Shiqing Gao c8bcab9006 hv: pci: update function "bdf_is_equal"
- update the function argument type to union
  Declaring argument as pointer is not necessary since it
  only does the comparison.

Tracked-On: #1842
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2019-09-25 13:45:39 +08:00
Li, Fei1 535a83e24b hv: vpci: refine vPCI BAR initialization
Initialize vBAR configure space when doing vPCI BAR initialization. At this time,
we access the physical device as we needs, no need to cache physical PCI device
BAR information beforehand.

Tracked-On: #3475
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-09-23 11:16:48 +08:00
Conghui Chen 65347d38dc hv: vuart: support reliable communication
The orignal communication port will lose data when tx is too fast, and
the data in FIFO will be overwritten.
Now, when the FIFO is full, stop sending more data. When the FIFO is not
full, notify the vuart to send more data.

Tracked-On: #3681
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-09-17 09:45:28 +08:00
Conghui Chen 8e4e1c96d1 hv: vuart bugfix for additional byte in tx fifo
For communication vuart, when it send data to target vuart's fifo, it
should meet the conditions:

1. MCR_LOOPBACK is not set
2. LCR_DLAB is not set
3. access reg is UART16550_THR
4. target_vu is not null

But the LCR_DLAB is missed now, and when vuart set it's UART16550_DLL,
it will be send to target by mistake as UART16550_DLL = UART16550_THR.
Add the missed condition.

DLAB in uart16550 spec:

Divisor Latch Access Bit.
1 = Allows access to the Divisor Latch Registers and reading of the FIFO
Control Register.
0 = Allows access to RBR, THR, IER and IIR registers.

Tracked-On: #3681
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2019-09-17 09:45:28 +08:00
Li, Fei1 de589c25fc hv: vpci: a minor fix about vpci_init_pt_dev
In "commit 6ebc22" the vPCI device initialize sequence is wrong changed. This patch
tries to revert it.

Tracked-On: #3475
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-09-16 15:32:26 +08:00
Li, Fei1 a6954486e9 hv: vpci: a minor fix about handling vmsix table mmio access for post-launched VM
In "commit 90480d" we use a pointer new_owner to point to the actual vPCI device
for post-launched VM when this device is assigned to this post-launched VM from
SOS. However, now DM will use SOS's vmsix_table_mmio_access_handler to trap vMSI-X
table mmio access for post-launched VM. So we should use the post-launched VM's
vPCI device in this case.

Tracked-On: #3475
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-09-16 15:32:26 +08:00
Li, Fei1 ca51cc9d8a hv: vPCI: vPCI device should use its virtual configure space to access its BAR
vPCI device should use its virtual configure space to access its BAR after vPCI
device initialized.
This patch also remove corner case "vPCI device will use its 64 bits BAR high idx
to access its BAR base address".

Tracked-On: #3475
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-09-11 13:17:42 +08:00
Li, Fei1 6ebc22210b hv: vPCI: cache PCI BAR physical base address
PCI BAR physical base address will never changed. Cache it to avoid calculating
it every time when we access it.

Tracked-On: #3475
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2019-09-11 13:17:42 +08:00
Conghui Chen 32d8510596 hv: remove pr_dbg between stac/clac
As the pr_dbg will access sbuf which will call stac/clac inside, so can
not put pr_dbg between stac/clac, it will case Page Fault.
acrn_print_request is a debug feature, and it calls pr_dbg. when the
loglevel is set to 6, there will be Page Fault.
So, remove the caller for acrn_print_request and mask the function as
unused, reserved for debug.

Tracked-On: #3648
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Reviewed-by: Yonghua Huang <yonghua.huang@intel.com>
2019-09-10 09:48:27 +08:00
Victor Sun c8cdc7e807 HV: move vCOM setting from Kconfig to board configs
The settings of SOS VM COM1 which is used for console is board specific,
and this result in SOS VM COM2 which used for VM communication is also
board specific, so move the configure method from Kconfig to board configs
folder. The MACRO definition will be handled by acrn-config tool in future.

Tracked-On: #3602

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-08-22 13:12:54 +08:00
Yonghua Huang 700a37856f hv: remove 'flags' field in struct vm_io_range
Currently, 'flags' is defined and set but never be used
  in the flow of handling i/o request after then.

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-08-19 10:19:54 +08:00
Yonghua Huang f791574f0e hv: refine the function pointer type of port I/O request handlers
In the definition of port i/o handler, struct acrn_vm * pointer
 is redundant as input, as context of acrn_vm is aleady linked
 in struct acrn_vcpu * by vcpu->vm, 'vm' is not required as input.

 this patch removes argument '*vm' from 'io_read_fn_t' &
 'io_write_fn_t', use '*vcpu' for them instead.

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-08-16 11:44:27 +08:00
Li, Fei1 90480db553 hv: vpci: split vPCI device from SOS for post-launched VM
When assgined a PCI PTDev to post-launched VM from SOS, using a pointer to point to
the real struct pci_vdev. When post-launched VM access its PTDev configure space in
SOS address space, using this real struct pci_vdev.

Tracked-On: #3475
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-08-12 10:00:44 +08:00
Li, Fei1 4c8e60f1d0 hv: vpci: add each vdev_ops for each emulated PCI device
Add a field (vdev_ops) in struct acrn_vm_pci_dev_config to configure a PCI CFG
operation for an emulated PCI device. Use pci_pt_dev_ops for PCI_DEV_TYPE_PTDEV
by default if there's no such configure.

Tracked-On: #3475
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-08-09 14:19:49 +08:00
Li, Fei1 5471473f60 hv: vpci: create iommu domain in vpci_init for all guests
Create an iommu domain for all guest in vpci_init no matter if there's a PTDev
in it.

Tracked-On: #3475
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Dongsheng Zhang <dongsheng.x.zhang@intel.com>
2019-08-06 11:51:02 +08:00
Li, Fei1 599a058403 hv: vpci: refine init_vdevs
Now almost the vPCI device information could be obtain from PCI device configure
in VM configure. init_vdevs could make things more easier.
And rename init_vdevs to vpci_init_vdevs, init_vdev to vpci_init_vdevs to avoid
MISRA-C violations.

Tracked-On: #3475
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Dongsheng Zhang <dongsheng.x.zhang@intel.com>
2019-08-06 11:51:02 +08:00
Li, Fei1 adbaaaf6cb hv: vpci: rename ptdev_config to pci_dev_config
pci_dev_config in VM configure stores all the PCI devices for a VM. Besides PT
devices, there're other type devices, like virtual host bridge. So rename ptdev
to pci_dev for these configure.

Tracked-On: #3475
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-08-06 11:51:02 +08:00
dongshen a092f40009 HV: make the functions void
The functions always return 0 so it makes sense to make them void functions

Tracked-On: #3475
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-07-29 09:58:57 +08:00
dongshen d6bf060573 HV: remove redundant function calling
The caller function has already done the checking to make sure the req is targeted
for the called functions, so there is no need to do the same checking in called
functions.

Remove calling of is_bar_offset() in vdev_pt_read_cfg/vdev_pt_write_cfg:
 In vpci.c's vpci_read_pt_dev_cfg and vpci_write_dev_cfg, vbar_access is called
 first to make sure the req is targed for vdev pt (vbar emulation) before
 dispatching the request to vdev_pt_read_cfg/vdev_pt_write_cfg, so there is no
 need to call is_bar_offset() again to do the same checking in vdev_pt_read_cfg/vdev_pt_write_cfg.

The same goes for msicap_access/msixcap_access

vbar_access should only check if the req is for bar access, it should not care
about whether the bar access is 4 bytes or 4 bytes aligned. The called function
vdev_pt_write_vbar will check and ignore the write access if it is not 4 bytes or 4 bytes
aligned, although this is counted as a bar access.

vdev_pt_read_vbar will check if the read access is 4 bytes or 4 bytes
aligned, although this is counted as a bar access, set read value (*val) to
-1 if the access is not 4 bytes (or aligned).

Tracked-On: #3475
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-07-29 09:58:57 +08:00
Li, Fei1 4a27d08360 hv: schedule: schedule to idel after SOS resume form S3
After "commit f0e1c5e init vcpu host stack when reset vcpu", SOS resume form S3
wants to schedule to vcpu_thread not the point where SOS enter S3. So we should
schedule to idel first then reschedule to execute vcpu_thread.

Tracked-On: #3387
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-07-29 09:53:18 +08:00
Yin Fengwei ce4d71e038 vpci: fix coding style issue
This is a followup patch to fix the coding style issue introduced
in by commit "c2d25aafb889ade954af8795df2405a94024d860":
  The unmodified pointer should be defined as const

Also addressed one comments from Fei to use reversed function call
in vpci_init_pt_dev and vpci_deinit_pt_dev.

Tracked-On: #3241
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-07-22 16:21:40 +08:00
Yin Fengwei cb9866bc6c softirq:spinlock: correct vioapic/vpic lock usage
Now, we are trying to move softirq from vcpu thread context to
real softirq context (it was not real softirq context even it has
softirq name), we need to make sure all the spinlock could be
access from softirq handler to use spinlock_irqsave_obtain and
spinlock_irqrestore_release.

Tracked-On: #3387
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-07-22 09:55:06 +08:00
Conghui Chen 05acc8b705 hv: vuart: bugfix for communication vuart
When a VM send data to its communication vuart, the vuart driver should
inject a DR interrupt to target VM and also inject a THRE interrupt to
self VM. But the original code inject the THRE interrupt to target VM,
correct it in this patch.

Tracked-On: #3423
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-07-18 09:28:27 +08:00
Yin Fengwei 009a16bd7d vhostbridge: update vhostbridge to use vdev_ops
And use vhostbridge for both SOS and pre-launched VM.

Tracked-On: #3241
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-07-15 10:35:47 +08:00
Yin Fengwei 9eba328bef vdev_ops: add general vdev ops
And use the ops based operations instead of direct access vdev
specific API.

Tracked-On: #3241
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-07-15 10:35:47 +08:00
Yin Fengwei 37de8f0b99 vbar:msi:msix: export vbar/msi/msix access checking
Change vbar/msi/msix access checking from private to public.

Tracked-On: #3241
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-07-15 10:35:47 +08:00
Huihuang Shi 714162fb8b HV: fix violations touched type conversion
ACRN Coding guidelines requires type conversion shall be explicity.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-07-11 09:16:09 +08:00
Li, Fei1 5930e96d12 hv: io_req: refine vhm_req status setting
In spite of vhm_req status could be updated in HV and DM on different CPUs, they
only change vhm_req status when they detect vhm_req status has been updated by
each other. So vhm_req status will not been misconfigured. However, before HV
sets vhm_req status to REQ_STATE_PENDING, vhm_req buffer filling should be visible
to DM. Add a write memory barrier to guarantee this.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-07-11 09:15:47 +08:00
Huihuang Shi 564a60120a HV: fix vuart.c "Parameter needs to add const"
ACRN Coding guidelines requires parameters need to add const prefix when the
parameter is not modified in its function or recursion function call.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-07-09 10:36:44 +08:00
Mingqiang Chi e4d1c321ad hv:fix "no prototype for non-static function"
change some APIs to static or include header file

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-07-09 10:36:03 +08:00
Cai Yulong 127c98f5db hv: vioapic: fix interrupt lost and redundant interrupt
1. reset polarity of ptirq_remapping_info to zero.
   this help to set correct initial pin state, and fix the interrupt lost issue
   when assign a ptirq to uos.

2. since vioapic_generate_intr relys on rte, we should build rte before
   generating an interrput, this fix the redundant interrupt.

Tracked-On: #3362
Signed-off-by: Cai Yulong <yulongc@hwtc.com.cn>
2019-07-05 10:22:56 +08:00
dongshen 012ec75163 HV: rename vbdf in struct pci_vdev to bdf
Rename vbdf to bdf for the following reasons:
Use the same coding style as struct pci_pdev, as pci_pdev uses bdf instead of pbdf

pci_vdev implies the its bdf is virtual, no need to prefix bdf with the v
prefix (redundant)

Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-07-04 11:25:01 +08:00
dongshen 148e747349 HV: add support for PIO bar emulation
For PIO bar emulation, initially or when guest reprograms the PIO bar, allow guest
access for the specified bar base address (pio port) and sized by calling vev_pt_allow_io_vbar

For PIO bar emulation, just set the initial vbar base address equal to pbar
base address. For example, if the pbar base address is 0x2000, then set the
initial vbar base address also to 0x2000

Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-07-04 11:25:01 +08:00
dongshen 4be09f24f3 HV: enable bar emulation for sos
For sos, its vbar base address is set to pbar base address (vbar gpa = pbar
hpa)

For pre-launched VMs, vbar base address is pre-assigned in vm_config

Rename vdev_pt_remap_msix_table_bar to vdev_pt_remap_msix_table_vbar and make it
a static function

Remove unused function prototye vdev_pt_remap_msix_table_bar() in vpci_priv.h

Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-07-04 11:25:01 +08:00
dongshen af163d579f HV: add support for 64-bit bar emulation
Enable 64-bit bar emulation, if pbar is of type PCIBAR_MEM64, vbar will also be
of type PCIBAR_MEM64 instead of PCIBAR_MEM32

With 64-bit bar emulation code in place, we can remove enum pci_bar_type type
from struct pci_bar as bar type can be derived from struct pci_bar's reg member
by using the pci_get_bar_type function

Rename functions:
  pci_base_from_size_mask --> git_size_masked_bar_base

Remove unused functions

Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-07-04 11:25:01 +08:00
dongshen ae996250c1 HV: extract functions from code to improve code reuse and readability
Create 2 functions from code:
 pci_base_from_size_mask
 vdev_pt_remap_mem_vbar

Use vbar in place of vdev->bar[idx] by setting vbar to &vdev->bar[idx]

Change base to uint64_t to accommodate 64-bit MMIO bar size masking in
subsequent commits

Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-07-01 09:57:05 +08:00
dongshen 84e09a2246 HV: remove uint64_t base from struct pci_bar
At this point, uint64_t base in struct pci_bar is not used by any code, so we
can remove it.

Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-07-01 09:57:05 +08:00
dongshen 5a8703f764 HV: need to unmap existing EPT mapping for a vbar base (gpa)
Only do the EPT mapping if vbar base (gpa) is not mapped to the same pbar (hpa) before.
Need to unmap the existing mapping for a vbar base (gpa), otherwise, hv will
throw an error.

Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-07-01 09:57:05 +08:00
dongshen 0247c0b942 Hv: minor cosmetic fix
Define/Use variable in place of code to improve readability:

Define new local variable struct pci_bar *vbar, and use vbar-> in place of vdev->bar[idx].

Define new local variable uint64_t vbar_base in init_vdev_pt

Rename uint64_t vbar[PCI_BAR_COUNT] of struct acrn_vm_pci_ptdev_config to uint64_t vbar_base[PCI_BAR_COUNT]

Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-07-01 09:57:05 +08:00
dongshen f0244b24e7 HV: call get_vbar_base() to get the newly set vbar base address in 64-bit
Replace new_base with vbar_base in vdev_pt_remap_generic_mem_vbar().
We will call vdev_pt_remap_generic_mem_vbar() after a new vbar base
is set, no need to pass new_base to vdev_pt_remap_generic_mem_vbar(),
as this new vbar base (vbar_base) can be obtained by calling get_vbar_base().

The reason we call vdev_pt_remap_generic_mem_vbar() after a new vbar base
is set is for 64-bit mmio handling: when the lower 32-bit of 64-bit mmio vbar is
set, we will defer calling vdev_pt_remap_generic_mem_vbar until its upper 32-bit
vbar base is set.

Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-07-01 09:57:05 +08:00
dongshen ed1bdcbbdf HV: add uint64_t bar_base_mapped[PCI_BAR_COUNT] to struct pci_vdev
To remember the previously mapped/registered vbar base

For the following reasons:
 register_mmio_emulation_handler() will throw an error if the the same addr_lo is
 alreayd registered before

 We are going to remove the base member from struct pci_bar, so we cannot use vdev->bar[idx].base
 in the code any more

 In subsequent commits, we will assume vdev_pt_remap_generic_mem_vbar() is called after a new
 vbar base is set, mainly because of 64-bit mmio bar handling, so we need a
 separate bar_base_mapped[] array to track the previously mapped vbar bases.

Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-07-01 09:57:05 +08:00
dongshen 65ca6ae498 HV: add get_vbar_base() to get vbar base address in 64-bit
vbar base can be built by using the base address fields stored in
struct pci_bar's reg member.

get_vbar_base: return vbar's base address in 64-bit. For 64-bit MMIO bar, its lower 32-bits
base address and upper 32-bits base are combined into one 64-bit base address

And changed related code to use get_vbar_base to get vbar base address in
64-bit.

Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-07-01 09:57:05 +08:00
dongshen 7a2f52441b HV: store the vbar base address in vbar's reg member
We added "union pci_bar_reg reg" to struct pci_bar in previous commit,
but only pci_pdev uses it and pci_vdev does not use it. Starting from
this commit, pci_vdev will use it:

In init_vdev_pt(), copy pbar's reg's flags portion to corresponding vbar's
reg.

When guest updates the vbar base address, the corresponding vbar reg's base
address will also be updated, so that in subsequent commits, we can eventually
remove the base member in struct pci_bar.

Rename local variable new_bar to base in vdev_pt_write_vbar

Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-07-01 09:57:05 +08:00
dongshen 1b4dbdab70 HV: add get_pbar_base() to get pbar base address in 64-bit
pbar base can be built by using the base address fields stored in
struct pci_bar's reg member.

get_pbar_base: return pbar's base address in 64-bit. For 64-bit MMIO bar, its lower 32-bits
base address and upper 32-bits base are combined into one 64-bit base address

pci_bar_2_bar_base: helper function that is called by get_pbar_base

And changed related code to use get_pbar_base to get pbar base address in 64-bit

Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-07-01 09:57:05 +08:00
dongshen 8707834f83 HV: remove the function get_bar_base()
There is no need to call get_bar_base(), as new_bar is set to val & mask,
where mask is the bar size mask, so new_base has already been set to be the
bar base address before get_bar_base() is called on it.

Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-07-01 09:57:05 +08:00