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Hv: minor cosmetic fix 

Define/Use variable in place of code to improve readability:

Define new local variable struct pci_bar *vbar, and use vbar-> in place of vdev->bar[idx].

Define new local variable uint64_t vbar_base in init_vdev_pt

Rename uint64_t vbar[PCI_BAR_COUNT] of struct acrn_vm_pci_ptdev_config to uint64_t vbar_base[PCI_BAR_COUNT]

Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
dongshen 2019-06-27 17:40:49 -07:00 committed by ACRN System Integration
parent f0244b24e7
commit 0247c0b942
3 changed files with 19 additions and 13 deletions
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18
hypervisor/dm/vpci/pci_pt.c
View File

@ -152,7 +152,6 @@ int32_t vdev_pt_read_cfg(const struct pci_vdev *vdev, uint32_t offset, uint32_t
void vdev_pt_remap_msix_table_bar(struct pci_vdev *vdev)
{
uint32_t i;
uint64_t addr_hi, addr_lo;
struct pci_msix *msix = &vdev->msix;
struct pci_pdev *pdev = vdev->pdev;
struct pci_bar *pbar;
@ -221,6 +220,8 @@ void vdev_pt_remap_msix_table_bar(struct pci_vdev *vdev)
if (msix->mmio_gpa != 0UL) {
uint64_t addr_hi, addr_lo;
if (is_prelaunched_vm(vdev->vpci->vm)) {
addr_hi = msix->mmio_gpa + msix->mmio_size;
addr_lo = msix->mmio_gpa;
@ -265,13 +266,16 @@ void vdev_pt_remap_msix_table_bar(struct pci_vdev *vdev)
static void vdev_pt_remap_generic_mem_vbar(struct pci_vdev *vdev, uint32_t idx)
{
struct acrn_vm *vm = vdev->vpci->vm;
struct pci_bar *vbar;
uint64_t vbar_base = get_vbar_base(vdev, idx); /* vbar (gpa) */
vbar = &vdev->bar[idx];
/* If the old vbar is mapped before, unmap it first */
if (vdev->bar_base_mapped[idx] != 0UL) {
ept_del_mr(vm, (uint64_t *)(vm->arch_vm.nworld_eptp),
vdev->bar_base_mapped[idx], /* GPA (old vbar) */
vdev->bar[idx].size);
vbar->size);
vdev->bar_base_mapped[idx] = 0UL;
}
@ -283,7 +287,7 @@ static void vdev_pt_remap_generic_mem_vbar(struct pci_vdev *vdev, uint32_t idx)
ept_add_mr(vm, (uint64_t *)(vm->arch_vm.nworld_eptp),
pbar_base, /* HPA (pbar) */
vbar_base, /* GPA (new vbar) */
vdev->bar[idx].size,
vbar->size,
EPT_WR | EPT_RD | EPT_UNCACHED);
/* Remember the previously mapped MMIO vbar */
@ -419,6 +423,7 @@ void init_vdev_pt(struct pci_vdev *vdev)
uint32_t idx;
struct pci_bar *pbar, *vbar;
uint16_t pci_command;
uint64_t vbar_base;
vdev->nr_bars = vdev->pdev->nr_bars;
@ -451,10 +456,11 @@ void init_vdev_pt(struct pci_vdev *vdev)
*/
vbar->type = PCIBAR_MEM32;
/* For pre-launched VMs: vbar base is predefined in vm_config */
vbar_base = vdev->ptdev_config->vbar_base[idx];
/* Set the new vbar base */
if (vdev->ptdev_config->vbar[idx] != 0UL) {
vdev_pt_write_vbar(vdev, pci_bar_offset(idx), (uint32_t)(vdev->ptdev_config->vbar[idx]));
}
vdev_pt_write_vbar(vdev, pci_bar_offset(idx), (uint32_t)vbar_base);
} else {
vbar->reg.value = 0x0U;
vbar->size = 0UL;

2
hypervisor/include/arch/x86/vm_config.h
View File

@ -81,7 +81,7 @@ struct acrn_vm_os_config {
struct acrn_vm_pci_ptdev_config {
union pci_bdf vbdf; /* virtual BDF of PCI PT device */
union pci_bdf pbdf; /* physical BDF of PCI PT device */
uint64_t vbar[PCI_BAR_COUNT]; /* vbar base address of PCI PT device */
uint64_t vbar_base[PCI_BAR_COUNT]; /* vbar base address of PCI PT device */
} __aligned(8);
struct acrn_vm_config {

12
hypervisor/scenarios/logical_partition/pt_dev.c
View File

@ -14,15 +14,15 @@ struct acrn_vm_pci_ptdev_config vm0_pci_ptdevs[VM0_CONFIG_PCI_PTDEV_NUM] = {
},
{
.vbdf.bits = {.b = 0x00U, .d = 0x01U, .f = 0x00U},
.vbar[0] = 0xc0084000UL,
.vbar[1] = 0xc0086000UL,
.vbar[5] = 0xc0087000UL,
.vbar_base[0] = 0xc0084000UL,
.vbar_base[1] = 0xc0086000UL,
.vbar_base[5] = 0xc0087000UL,
VM0_STORAGE_CONTROLLER
},
{
.vbdf.bits = {.b = 0x00U, .d = 0x02U, .f = 0x00U},
.vbar[0] = 0xc0000000UL,
.vbar[3] = 0xc0080000UL,
.vbar_base[0] = 0xc0000000UL,
.vbar_base[3] = 0xc0080000UL,
VM0_NETWORK_CONTROLLER
},
};
@ -34,7 +34,7 @@ struct acrn_vm_pci_ptdev_config vm1_pci_ptdevs[VM1_CONFIG_PCI_PTDEV_NUM] = {
},
{
.vbdf.bits = {.b = 0x00U, .d = 0x01U, .f = 0x00U},
.vbar[0] = 0xc0000000UL,
.vbar_base[0] = 0xc0000000UL,
VM1_STORAGE_CONTROLLER
},
#if defined(VM1_NETWORK_CONTROLLER)