Commit Graph

25 Commits

Author SHA1 Message Date
Madeeha Javed a257f2fadc HV: Fixes index out of bounds for addressing irq.
NR_MAX_IRQS is defined as 272 and IRQ_INVALID as 273 which implies
that 272 is a valid irq number. In this case, an illegal access can
occur at run time when irq_desc_array[] or irq_count[] is accessed
with index 272. This fix stops the illegal access by renaming
NR_MAX_IRQS to NR_IRQS and then places proper conditions for range
checks. If the index is >= NR_IRQS, then index is invalid otherwise
its considered valid for accessing irq arrays. IRQ_INVALID definition
is also changed to 0xffffffffU to indicate maximum unsigned value.

Signed-off-by: Madeeha Javed <madeeha_javed@mentor.com>
2018-07-19 11:06:42 +08:00
Mingqiang Chi aa2b2d80d4 hv: change several APIs to void type
Change these 6 APIs to void type:
  init_default_irqs
  interrupt_init
  early_init_lapic
  init_lapic
  init_iommu
  destroy_iommu_domain
It has checked the argument of destroy_iommu_domain in shutdown_vm,
then no need to check it again inside destroy_iommu_domain.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-18 12:30:37 +08:00
Minggui Cao 2f2d108b1e HV: handle integral issue report by MISRA-C
The main focus on: constant suffix U/UL; parameters cast like
uint32 to a uint16 variable; unify some APIs interface,
consist with the callers.

also modify some places to unify code style

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
2018-07-16 16:24:29 +08:00
Yang, Yu-chu 90b342bd53 HV: prototyping non-static function
Includes header file of non-static function, and declare the
in-file use function static.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-16 10:35:54 +08:00
Mingqiang Chi 1d628c640c hv:fix MISRA-C return value violation
1) Change these 5 APIs to void type:
   vcpu_inject_pf
   uart16550_calc_baud_div
   uart16550_set_baud_rate
   console_init
   ptdev_activate_entry
No need to return 'entry' for ptdev_activate_entry
since the input parameter is 'entry'.
2) no need to check return value for the caller
   such as sbuf_put/console_putc/serial_puts/serial_get_rx_data

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-07-13 13:04:39 +08:00
Mingqiang Chi 2686fe76bc hv: no need to return error when inject GP
GP fault is a normal case,no need to return error.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 16:35:20 +08:00
Xiangyang Wu b76c92bf3e HV:treewide:Update cpu_id type as uint_16
There are extra type conversion in the HV since cpu_id
type is uint32_t and the return value type of get_cpu_id
is uint16_t. BTW, the name of cpu_id is not clear enough
to express its usage.

So the following updates are made in this patch:
Update cpu_id type as unit_16 to reduce type casting;
Update related temporary variables type;
Update related print argument;
Change the input parameter name of interrupt_init as
cpu_id to keep align with function implement;
Rename cpu_id as pcpu_id as needed.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-04 16:39:26 +08:00
Junjie Mao cfc3811a0a HV: treewide: drop debug-only helpers in release build
There are multiple helpers for collecting info to be printed on the ACRN uart
console. They are unreachable code in release builds in which the uart console
is removed.

To define a precise boundary for safety-related activities, this patch wraps the
declarations and definitions to these helpers with "#ifdef HV_DEBUG" so that
these unreachable APIs will be dropped in release builds.

v1 -> v2:

    * Fix coding style: no empty lines between #ifdef and the wrapped code.
    * Also drop get_rte_info() in ioapic.c, which is solely used by
      get_ioapic_info().

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 14:35:39 +08:00
Yan, Like f74675ce21 hv: pirq: add a header for common data struct and APIs
- add a commont head file include/common/irq.h, to include the common data
  structure and APIs;
- move the common data struct and APIs from arch/x86/irq.h to the common header.

Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 00:50:01 +08:00
Xiangyang Wu c585172492 Rename phy_cpu_num as phys_cpu_num
phys_cpu_num is more popular than phy_cpu_num, update them
through command.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-22 16:12:52 +08:00
Xiangyang Wu 3027bfab10 HV: treewide: enforce unsignedness of pcpu_id
In the hypervisor, physical cpu id is defined as "int" or "uint32_t"
type in the hypervisor. So there are some sign conversion issues
about  physical cpu id (pcpu_id) reported by static analysis tool.
Sign conversion violates the rules of MISRA C:2012.

In this patch, define physical cpu id as "uint16_t" type for all
modules in the hypervisor and change related codes. The valid
range of pcpu_id is 0~65534, INVALID_PCPU_ID is defined to the
invalid pcpu_id for error detection, BROADCAST_PCPU_ID is
broadcast pcpu_id used to notify all valid pcpu.

The type of pcpu_id in the struct vcpu and vcpu_id is "int" type,
this will be fixed in another patch.

V1-->V2:
    *  Change the type of pcpu_id from uint32_t to uint16_t;
    *  Define INVALID_PCPU_ID for error detection;
    *  Define BROADCAST_PCPU_ID to notify all valid pcpu.

V2-->V3:
    *  Update comments for INVALID_PCPU_ID and BROADCAST_PCPU_ID;
    *  Update addtional pcpu_id;
    *  Convert hexadecimals to unsigned to meet the type of pcpu_id;
    *  Clean up for MIN_PCPU_ID and MAX_PCPU_ID, they will be
       defined by configuration.
Note: fix bug in the init_lapic(), the pcpu_id shall be less than 8,
this is constraint by implement in the init_lapic().
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-21 16:59:21 +08:00
Junjie Mao 41a1035f9b HV: irq: convert hexadecimals used in bitops to unsigned
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-06-21 13:12:39 +08:00
Huihuang Shi 977c4b20b5 fix parted of "missing for discarded return value"
MISRA C required that return value should be used, missing for it should
add "(void)" prefix before the function call.
Some function can be declared without return value to avoid this problem.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-19 16:21:45 +08:00
Junjie Mao 8c4a5987e3 irq: convert irq/vector numbers to unsigned
Currently irq and vector numbers are used inconsistently.

    * Sometimes vector or irq ids is used in bit operations, indicating
      that they should be unsigned (which is required by MISRA C).

    * At the same time we use -1 to indicate an unknown irq (in
      common_register_handler()) or unavailable irq (in
      alloc_irq()). Also (irq < 0) or (vector < 0) are used for error
      checking. These indicate that irq or vector ids should be signed.

This patch converts irq and vector numbers to unsigned 32-bit integers, and
replace the previous -1 with IRQ_INVALID or VECTOR_INVALID. The branch
conditions are updated accordingly.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-12 10:21:58 +08:00
David B. Kinder f4122d99c5 license: Replace license text with SPDX tag
Replace the BSD-3-Clause boiler plate license text with an SPDX tag.

Fixes: #189

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-06-01 10:43:06 +08:00
Jason Chen CJ 7718338008 exception: add vcpu_inject_pf support
add page fault exception injection support

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-30 13:51:49 +08:00
Jason Chen CJ 75a03bf0f7 exception: use func vcpu_queue_exception to inject exception
use func vcpu_queue_exception for vcpu_inject_gp and exception_vmexit_handler.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-30 13:51:49 +08:00
Jason Chen CJ 277830aba8 exception: add vcpu_queue_exception function
add func vcpu_queue_exception to queue exception based on SDM Vol3 Table 6-5,
which may cause #DF or triple fault

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-30 13:51:49 +08:00
Jason Chen CJ 4607177383 replace pending_intr with pending_req
the pending_intr is not only serving for interrupt but also for different
request including TLB & TMR updating, so change the function & variants
name accordingly.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-30 13:51:49 +08:00
Mingqiang Chi 8384ed2564 hv:rename data structure intr_ctx
rename intr_ctx to intr_excp_ctx

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-23 13:38:52 +08:00
Mingqiang Chi 88b8ce8362 hv: move structure(intr_ctx) to irq.h
move intr_ctx to irq.h, delete intr_ctx.h

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-23 13:38:52 +08:00
Yonghua Huang bb011a4316 rename vmexit handlers
this patch is to align the suffix of the handlers' name.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:25:55 +08:00
Jason Chen CJ a87757d602 uefi: remove old interrupt injection method
we added uefi stub for hv, and want vm0 continue running under uefi env to
boot other uefi payload (osloader or bzImage).

during this, the uefi timer irq need be handled elegantly.

there are 3 types for uefi timer:
1. 8254 based on IRQ0 of PIC
2. HPET based on IOAPIC
3. HPET based on MSI

currently, we only support type 3 (HPET+MSI). But we are following a
in-correct flow to handle this timer interrupt:
- we set VMX_ENTRY_INT_INFO_FIELD directly if a timer interrupt happened
  before vcpu launching, this will make its vlapic mess up, which finally
  cause hpet timer stop.

this patch remove this in-correct approach, the new approach patch will
be followed by next patch.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-05-15 17:19:37 +08:00
Yin Fengwei 189329e0de apicv: cancel event injection if vcpu is scheduled out
And re-inject the event after vcpu is scheduled in.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2018-05-15 17:19:36 +08:00
Eddie Dong 7a3a539b17 initial import
internal commit: 14ac2bc2299032fa6714d1fefa7cf0987b3e3085

Signed-off-by: Eddie Dong <eddie.dong@intel.com>
2018-05-11 14:44:28 +08:00