hv: pirq: add a header for common data struct and APIs
- add a commont head file include/common/irq.h, to include the common data structure and APIs; - move the common data struct and APIs from arch/x86/irq.h to the common header. Signed-off-by: Yan, Like <like.yan@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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@ -8,32 +8,6 @@
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static spinlock_t exception_spinlock = { .head = 0, .tail = 0, };
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struct irq_request_info {
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/* vector set to 0xE0 ~ 0xFF for pri_register_handler
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* and set to VECTOR_INVALID for normal_register_handler
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*/
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uint32_t vector;
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dev_handler_t func;
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void *dev_data;
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bool share;
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bool lowpri;
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char *name;
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};
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/* any field change in below required irq_lock protection with irqsave */
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struct irq_desc {
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uint32_t irq; /* index to irq_desc_base */
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enum irq_state used; /* this irq have assigned to device */
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enum irq_desc_state state; /* irq_desc status */
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uint32_t vector; /* assigned vector */
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void *handler_data; /* irq_handler private data */
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int (*irq_handler)(struct irq_desc *irq_desc, void *handler_data);
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struct dev_handler_node *dev_list;
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spinlock_t irq_lock;
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uint64_t *irq_cnt; /* this irq cnt happened on CPUs */
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uint64_t irq_lost_cnt;
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};
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static struct irq_desc *irq_desc_base;
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static uint32_t vector_to_irq[NR_MAX_VECTOR + 1];
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@ -4,8 +4,10 @@
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef IRQ_H
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#define IRQ_H
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#ifndef ARCH_IRQ_H
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#define ARCH_IRQ_H
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#include <common/irq.h>
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/* vectors for normal, usually for devices */
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#define VECTOR_FOR_NOR_LOWPRI_START 0x20U
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@ -33,40 +35,6 @@
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#define DEFAULT_DELIVERY_MODE IOAPIC_RTE_DELLOPRI
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#define ALL_CPUS_MASK ((1U << phys_cpu_num) - 1U)
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struct irq_desc;
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enum irq_mode {
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IRQ_PULSE,
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IRQ_ASSERT,
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IRQ_DEASSERT,
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};
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enum irq_state {
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IRQ_NOT_ASSIGNED = 0,
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IRQ_ASSIGNED_SHARED,
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IRQ_ASSIGNED_NOSHARE,
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};
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enum irq_desc_state {
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IRQ_DESC_PENDING,
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IRQ_DESC_IN_PROCESS,
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};
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typedef int (*dev_handler_t)(int irq, void*);
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struct dev_handler_node {
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char name[32];
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void *dev_data;
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dev_handler_t dev_handler;
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struct dev_handler_node *next;
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struct irq_desc *desc;
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};
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struct irq_routing_entry {
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unsigned short bdf; /* BDF */
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int irq; /* PCI cfg offset 0x3C: IRQ pin */
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int intx; /* PCI cfg offset 0x3D: 0-3 = INTA,INTB,INTC,INTD*/
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};
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/*
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* Definition of the stack frame layout
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*/
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@ -97,44 +65,15 @@ struct intr_excp_ctx {
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uint64_t ss;
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};
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uint32_t irq_mark_used(uint32_t irq);
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uint32_t irq_alloc(void);
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uint32_t irq_desc_alloc_vector(uint32_t irq, bool lowpri);
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void irq_desc_try_free_vector(uint32_t irq);
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uint32_t irq_to_vector(uint32_t irq);
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uint32_t dev_to_irq(struct dev_handler_node *node);
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uint32_t dev_to_vector(struct dev_handler_node *node);
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int handle_level_interrupt_common(struct irq_desc *desc, void *handler_data);
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int common_handler_edge(struct irq_desc *desc, void *handler_data);
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int common_dev_handler_level(struct irq_desc *desc, void *handler_data);
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int quick_handler_nolock(struct irq_desc *desc, void *handler_data);
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typedef int (*irq_handler_t)(struct irq_desc*, void*);
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void update_irq_handler(uint32_t irq, irq_handler_t func);
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int init_default_irqs(uint16_t cpu);
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void dispatch_interrupt(struct intr_excp_ctx *ctx);
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struct dev_handler_node*
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pri_register_handler(uint32_t irq,
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uint32_t vector,
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dev_handler_t func,
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void *dev_data,
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const char *name);
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struct dev_handler_node*
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normal_register_handler(uint32_t irq,
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dev_handler_t func,
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void *dev_data,
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bool share,
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bool lowpri,
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const char *name);
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void unregister_handler_common(struct dev_handler_node *node);
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void get_cpu_interrupt_info(char *str, int str_max);
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void setup_notification(void);
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@ -171,4 +110,4 @@ int acrn_handle_pending_request(struct vcpu *vcpu);
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int interrupt_init(uint32_t logical_id);
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void cancel_event_injection(struct vcpu *vcpu);
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#endif /* IRQ_H */
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#endif /* ARCH_IRQ_H */
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@ -4,7 +4,8 @@
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#include <bsp_extern.h>
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#include <schedule.h>
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#include <version.h>
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#include <irq.h>
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#include <common/irq.h>
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#include <arch/x86/irq.h>
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#include <sbuf.h>
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#include <gdt.h>
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#include <timer.h>
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@ -0,0 +1,90 @@
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/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef COMMON_IRQ_H
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#define COMMON_IRQ_H
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enum irq_mode {
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IRQ_PULSE,
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IRQ_ASSERT,
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IRQ_DEASSERT,
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};
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enum irq_state {
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IRQ_NOT_ASSIGNED = 0,
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IRQ_ASSIGNED_SHARED,
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IRQ_ASSIGNED_NOSHARE,
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};
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enum irq_desc_state {
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IRQ_DESC_PENDING,
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IRQ_DESC_IN_PROCESS,
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};
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typedef int (*dev_handler_t)(int irq, void*);
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struct irq_request_info {
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/* vector set to 0xE0 ~ 0xFF for pri_register_handler
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* and set to VECTOR_INVALID for normal_register_handler
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*/
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uint32_t vector;
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dev_handler_t func;
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void *dev_data;
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bool share;
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bool lowpri;
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char *name;
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};
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/* any field change in below required irq_lock protection with irqsave */
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struct irq_desc {
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uint32_t irq; /* index to irq_desc_base */
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enum irq_state used; /* this irq have assigned to device */
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enum irq_desc_state state; /* irq_desc status */
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uint32_t vector; /* assigned vector */
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void *handler_data; /* irq_handler private data */
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int (*irq_handler)(struct irq_desc *irq_desc, void *handler_data);
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struct dev_handler_node *dev_list;
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spinlock_t irq_lock;
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uint64_t *irq_cnt; /* this irq cnt happened on CPUs */
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uint64_t irq_lost_cnt;
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};
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struct dev_handler_node {
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char name[32];
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void *dev_data;
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dev_handler_t dev_handler;
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struct dev_handler_node *next;
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struct irq_desc *desc;
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};
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uint32_t irq_mark_used(uint32_t irq);
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uint32_t irq_desc_alloc_vector(uint32_t irq, bool lowpri);
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void irq_desc_try_free_vector(uint32_t irq);
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uint32_t irq_to_vector(uint32_t irq);
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uint32_t dev_to_irq(struct dev_handler_node *node);
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uint32_t dev_to_vector(struct dev_handler_node *node);
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struct dev_handler_node*
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pri_register_handler(uint32_t irq,
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uint32_t vector,
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dev_handler_t func,
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void *dev_data,
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const char *name);
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struct dev_handler_node*
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normal_register_handler(uint32_t irq,
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dev_handler_t func,
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void *dev_data,
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bool share,
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bool lowpri,
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const char *name);
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void unregister_handler_common(struct dev_handler_node *node);
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typedef int (*irq_handler_t)(struct irq_desc*, void*);
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void update_irq_handler(uint32_t irq, irq_handler_t func);
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#endif /* COMMON_IRQ_H */
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