Commit Graph

5100 Commits

Author SHA1 Message Date
David B. Kinder a7a5c41e75 doc: update doc guidelines for sphinx-tabs
Include how to use the sphinx-tabs directives.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-04-21 16:11:16 -07:00
David B. Kinder 426c214733 doc: add sphinx-tabs extension
The sphinx-tabs extension let's us create a document that can
dynamically display alternate material based on clicking a tab, as used
in the Zephyr getting started guide:
https://docs.zephyrproject.org/latest/getting_started/index.html

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-04-21 12:14:00 -07:00
lirui34 aef1f4cde8 doc: remove the kbl-nuc flow pic from the partition mode gsg.
Signed-off-by: lirui34 <ruix.li@intel.com>
2020-04-21 13:51:55 -04:00
Sainath Grandhi c548ba10b9 acrn-config: Generate info in pci_dev file for Pre-Launched VMs
Pre-Launched VMs need the vbar_base values pre-populated
for pass-thru PCI devices.

This patch moves the pci parser logic from board_cfg_gen to library
so that scenario_cfg_gen scripts can use pci parser routines while
generating pci_dev file logical partition scenario.

Tracked-On: #4666
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2020-04-20 21:59:23 +08:00
Victor Sun e5561a5c71 HV: remove sdc2 scenario support
Remove sdc2 scenario since the VM launch requirement under this scenario
could be satisfied by industry scenario now;

Tracked-On: #4661

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-04-20 14:59:23 +08:00
Victor Sun a90890e9c7 HV: support up to 7 post launched VMs for industry scenario
In industry scenario, hypervisor will support 1 post-launched RT VM
and 1 post-launched kata VM and up to 5 post-launched standard VMs;

Tracked-On: #4661

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-04-20 14:59:23 +08:00
Victor Sun 09212cf4b6 HV: Kconfig: enable CPU sharing by default
The patch enables CPU sharing feature by default, the default scheduler is
set to SCHED_BVT;

Tracked-On: #4661

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-04-20 14:59:23 +08:00
Yin Fengwei 345cb77376 crashlog: fix build issue under latest clearlinux
gcc in latest clearlinux enabled the pointer-sign warning as
default. This breaks the acrn-crashlog build.

Make acrn-crashlog build issue fixed by convert to correct
pointer type.

Tracked-On: #4636
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2020-04-20 14:54:33 +08:00
Sainath Grandhi 60c4ec0c59 hv: Wake up vCPU for interrupts from vPIC
Wake up vCPUs that are blocked upon interrupts from vPIC.

Tracked-On: #4664
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2020-04-20 09:49:41 +08:00
Deb Taylor 1815ed4e14 Doc: Minor grammatical edits to GSG for ACRN logical part mode
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2020-04-17 11:20:29 -04:00
lirui34 3b21146dfb doc: update partition mode tutorial to use whl board.
Signed-off-by: lirui34 <ruix.li@intel.com>
2020-04-17 09:56:07 -04:00
Victor Sun dfb947fe91 HV: fix wrong gpa start of hpa2 in ve820.c
The current logic puts hpa2 above GPA 4G always, which is incorrect. Need
to set gpa start of hpa2 right after hpa1 when hpa1 size is less then 2G;

Tracked-On: #4458

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-04-17 14:08:54 +08:00
Victor Sun fe6407155f HV: set default MCFG base for generic board
On most board the MCFG base is set to 0xe0000000, so modify this value in
platform_acpi_info.h for generic boards;

The description of ACPI_PARSE_ENABLED is modified also to match its usage.

Tracked-On: #4157

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-04-17 13:49:58 +08:00
Shuang Zheng 6aeadb9cbb acrn-config: add template xmls for dynamic config
The template xmls are used to be the dafault VM settings for dynamically
adding VMs.

Tracked-On: #4641

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
2020-04-17 13:45:18 +08:00
Shuang Zheng b9ce7617cd acrn-config: dynamic configuration for scenario setting and launch setting
config app implements interfaces to dynamically:
    create new scenario settings based on tempaltes;
    create new launch settings based on templates;
    add or delete VMs for scenario settings;
    add or delete VMs for launch settings;
    load default scenario or launch settings

Tracked-On: #4641

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com
Reviewed-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
2020-04-17 13:45:18 +08:00
Wei Liu ccef1af1f0 acrn-config: remove hard code UUID from config xmls
To keep align hv source code changes, config tool doese below changes:
1. Remove UUID from scenario config files.
2. Remove severity from scenario config files.
3. Use vm type to instead load order type.
4. Use the mapped UUID data base for launch vm script configurations.
5. Unify the ui_entry_api for '--out'

Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
2020-04-17 13:45:18 +08:00
Wei Liu eb341caa83 acrn-config: Use vm_type to instead load_type/uuid/severity in config
Use vm_type to instead combination of load_type/uuid/severity in config
xmls.

Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
2020-04-17 13:45:18 +08:00
Wei Liu eba8c23bff acrn-config: support to parse pci_devs for pre launched vm
As it doesn't depends on the scenario, there are sos/pre launched VMS
in config xmls, emulate vhostbridge for sos vm, specify the pass-thru
PCI device for pre launched vm.
Add support to parse pci_devs for pre launched vm.

Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
2020-04-17 13:45:18 +08:00
Wei Liu 8fbd859fbf acrn-config: add pass-thru PCI device for pre launched vm xmls
Add pass-thru PCI device for pre launched vm section in config xmls.

Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
2020-04-17 13:45:18 +08:00
Wei Liu c967c0d522 acrn-config: remove 'scenario' dependency from acrn config tool
For purpose weaken 'scenario' from config tool, remove 'scenario' dependency
from config tool.

Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
2020-04-17 13:45:18 +08:00
Victor Sun e57ad3fd2f Makefile: disable KCONFIG_FILE when build from xml
The SCENARIO xml file already includes all information of KCONFIG file,
use KCONFIG_FILE/SCENARIO_FILE parameter at same time would introduce
conflict so this case should be invalid.

Tracked-On: #4616

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-04-17 13:45:18 +08:00
Victor Sun 3fd5fc9b51 Kconfig: remove MAX_KATA_VM_NUM
CONFIG_MAX_KATA_VM_NUM is a scenario specific configuration, so it is better
to put the MACRO in scenario folder directly, to instead the Kconfig item in
Kconfig file which should work for all scenarios;

Tracked-On: #4616

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-04-17 13:45:18 +08:00
Victor Sun dba0591f72 Kconfig: change scenario variable type to string
Basicly ACRN scenario is a configuration name for specific usage. By giving
scenario name ACRN will load corresponding VM configurations to build the
hypervisor. But customer might have their own scenario name, change the
scenario type from choice to string is friendly to them since Kconfig source
file change will not be needed.

With this change, CONFIG_$(SCENARIO) will not exist in kconfig file and will
be instead of CONFIG_SCENARIO, so the Makefile need to be changed accordingly;

Tracked-On: #4616

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-04-17 13:45:18 +08:00
Victor Sun 7282b933fb HV: merge sos_pci_dev config to sos macro
The pci_dev config settings of SOS are same so move the config interface
from vm_configurations.c to CONFIG_SOS_VM macro;

Tracked-On: #4616

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-04-17 13:45:18 +08:00
Victor Sun 55b50f408f HV: init vm uuid and severity in macro
Currently the vm uuid and severity is initilized separately in
vm_config struct, developer need to take care both items carefuly
otherwise hypervisor would have trouble with the configurations.

Given the vm loader_order/uuid and severity are binded tightly, the
patch merged these tree settings in one macro so that developer will
have a simple interface to configure in vm_config struct.

Tracked-On: #4616

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-04-17 13:45:18 +08:00
yuhong.tao@intel.com 7c80acee95 HV: emulate MSR_TEST_CTL
If CPU has MSR_TEST_CTL, show an emulaued one to VCPU

Tracked-On: #4496
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-04-17 09:53:59 +08:00
yuhong.tao@intel.com dd3fa8ed75 HV: enable #AC for Splitlock Access
If CPU support rise #AC for Splitlock Access, then enable this
feature at each CPU.

Tracked-On: #4496
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-04-17 09:53:59 +08:00
yuhong.tao@intel.com ea1bce0cbf HV: enumerate capability of #AC for Splitlock Access
When the destination of an atomic memory operation located in 2
cache lines, it is called a Splitlock Access. LOCK# bus signal is
asserted for splitlock access which may lead to long latency. #AC
for Splitlock Access is a CPU feature, it allows rise alignment
check exception #AC(0) instead of asserting LOCK#, that is helpful
to detect Splitlock Access.

This feature is enumerated by MSR(0xcf) IA32_CORE_CAPABILITIES[bit5]
Add helper function:
    bool has_core_cap(uint32_t bitmask)

Tracked-On: #4496
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-04-17 09:53:59 +08:00
Deb Taylor decd89e48d Doc: Initial version of ARCN RTVM Perf Tips
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2020-04-16 20:44:09 -04:00
David B. Kinder c9a357c95a doc: update doc guidelines
Update the doc writing guidelines to include some new capabilities
(multi-column display, numbered instruction steps) and add more
information about writing tables.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-04-16 08:18:20 -07:00
Mingqiang Chi 2d3c60ccd3 dm: add vm_pause before vm_destroy
now VM state transition only allows VM_PAUSED to
VM_POWERED_OFF, this patch call vm_pause before vm_destroy
in some vm failure cases.

Tracked-On: #4320
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2020-04-16 22:09:04 +08:00
Mingqiang Chi 2b648476cc life_mngr:fix resend shutdown cmd fail
1) fix a bug,resend shutdown cmd only send one character
2) move out accept routine from while loop, let this thread
   can read data from acrn-dm continuously.

Tracked-On: #4446
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Yuhong Tao <yuhong.tao@intel.com>
Reviewed-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
2020-04-16 22:04:53 +08:00
Mingqiang Chi 90b8d844d0 dm:refine pm_vuart code
1) remove state machine
2) remove retry mechanism
3) pm thread only use to transmit data,not parse detailed message.

v1-->v2:
   remove delay in pm_monitor_loop
Tracked-On: #4446
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Yuhong Tao <yuhong.tao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2020-04-16 22:01:54 +08:00
Mingqiang Chi f90100e382 hv: add pre-condition for vcpu APIs
remove unnecessary state check and
add pre-condition for vcpu APIs.

Tracked-On: #4320
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-04-16 21:59:03 +08:00
Jason Chen CJ 0584981c03 hv:add pre-condition for vm APIs
check the vm state in hypercall api,
add pre-condition for vm api.

Tracked-On: #4320
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-04-16 21:59:03 +08:00
Mingqiang Chi fe929d0a10 hv: move out pause_vm from shutdown_vm
now it will call pause_vm in shutdown_vm,
move it out from shutdown_vm to reduce coupling.
Tracked-On: #4320
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-04-16 21:59:03 +08:00
Naveen Saini fc5292e354 acrnprobe: avoid race condition
main.c is compiled while version.h being generated. This will
result following error:

| main.c: In function 'main':
| main.c:95:5: error: 'AP_MAJOR_VERSION' undeclared (first use in this function)
|    95 |     AP_MAJOR_VERSION, AP_MINOR_VERSION,
|       |     ^~~~~~~~~~~~~~~~
| main.c:95:5: note: each undeclared identifier is reported only once for each function it appears in
| main.c:95:23: error: 'AP_MINOR_VERSION' undeclared (first use in this function)
|    95 |     AP_MAJOR_VERSION, AP_MINOR_VERSION,
|       |                       ^~~~~~~~~~~~~~~~
| main.c:96:5: error: 'AP_BUILD_VERSION' undeclared (first use in this function)
|    96 |     AP_BUILD_VERSION, AP_BUILD_USER,
|       |     ^~~~~~~~~~~~~~~~
| main.c:96:23: error: 'AP_BUILD_USER' undeclared (first use in this function)
|    96 |     AP_BUILD_VERSION, AP_BUILD_USER,
|       |                       ^~~~~~~~~~~~~
| main.c:97:5: error: 'AP_BUILD_TIME' undeclared (first use in this function)
|    97 |     AP_BUILD_TIME);
|       |     ^~~~~~~~~~~~~

Similar issues observed with usercrash too.

To fix this, add version.h header as dependency, to make sure
it is generated successfully.

Tracked-On: #4590

Signed-off-by: Naveen Saini <naveen.kumar.saini@intel.com>
2020-04-16 21:49:18 +08:00
Yonghua Huang 84eaf94ae6 hv: wrap a function to initialize pCPU for second phase
This patch wrapps a common function to initialize physical
 CPU for the second phase to reduce redundant code.

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2020-04-16 14:02:29 +08:00
Zide Chen 5420b34a26 hv: provide vm_config information in get_platform_info hypercall
Hypervisor reports VM configuration information to SOS which can be used to
dynamically allocate VCPU affinity.

Servise OS can get the vm_configs in this order:

1. call platform_info HC (set vm_configs_addr with 0) to get max_vms and
   vm_config_entry_size.
2. allocate memory for acrn_vm_config array based on the number of VMs
   and entry size that just got in step 1.
3. call platform_info HC again to collect VM configurations.

Tracked-On: #4616
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-04-16 13:46:27 +08:00
Shuang Zheng b9583f42e9 acrn-config: enable hv config for scenarion setting UI
config app supports hv config in scenario setting UI.

Tracked-On: #4634
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
Acked by: Terry Zou <terry.zou@intel.com>
2020-04-16 08:50:31 +08:00
Wei Liu b4a61abe45 acrn-config: add hv configurations to scenario config xmls
Update the board defconfig to scenario config xmls, and user can configure
it from webUI.

Tracked-On: #4634
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
2020-04-16 08:50:31 +08:00
Wei Liu b30d304d69 acrn-config: add support to parse board defconfig from configurations
Board defconfig depends on hypervisor configurations and vm configurations,
add this to support to parse board defconfig from vm configuration.

Tracked-On: #4634
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
2020-04-16 08:50:31 +08:00
Xiaoguang Wu d4f789f47e hv: iommu: remove snoop related code
ACRN disables Snoop Control in VT-d DMAR engines for simplifing the
implementation. Also, since the snoop behavior of PCIE transactions
can be controlled by guest drivers, some devices may take the advantage
of the NO_SNOOP_ATTRIBUTE of PCIE transactions for better performance
when snoop is not needed. No matter ACRN enables or disables Snoop
Control, the DMA operations of passthrough devices behave correctly
from guests' point of view.

This patch is used to clean all the snoop related code.

Tracked-On: #4509
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2020-04-16 08:40:17 +08:00
Xiaoguang Wu b4f1e5aa85 hv: iommu: disable snoop bit in EPT-PTE/SL-PTE
Due to the fact that i915 iommu doesn't support snoop, hence it can't
access memory when the SNOOP bit of Secondary Level page PTE (SL-PTE)
is set, this will cause many undefined issues such as invisible cursor
in WaaG etc.

Current hv design uses EPT as Scondary Leval Page for iommu, and this
patch removes the codes of setting SNOOP bit in both EPT-PTE and SL-PTE
to avoid errors.

And according to SDM 28.2.2, the SNOOP bit (11th bit) will be ignored
by EPT, so it will not affect the CPU address translation.

Tracked-On: #4509
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2020-04-16 08:40:17 +08:00
David B. Kinder 4b1dfe9632 doc: remove trailing spaces
Remove trailing spaces on lines to avoid potential issues with git

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-04-15 11:46:06 -07:00
Sainath Grandhi f290f22344 doc: Known Limitation regarding PCI devices and resources assignment
ACRN assumes certain state for the PCI devices w.r.t. resources assigned to them
before the platform BIOS hands control over to itself.
When the same BIOS is used with native OS boot, there should not be a need for
native kernel to re-program device BARs or bridge windows for bridge devices.

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2020-04-15 10:49:10 -07:00
David B. Kinder 237997f3f9 doc: change UOS/SOS to User VM/Service VM
First pass at updating obsolete usage of "UOS" and "SOS"

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-04-15 10:48:25 -07:00
David B. Kinder f5f16f4e64 doc: clean up utf8 characters
Stray non-ASCII characters can creep in when pasting from Word or Google
Docs, particularly for "smart" single and double quotes and non-breaking
spaces.  Change these to their ASCII equivalents.  Also fixed some very
long lines of text to wrap at 80-ish characters.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-04-15 10:17:54 -07:00
Wei Liu 138c3aeadd acrn-config: support passthroug GVT for WaaG by default
Modify launch config tool to support passthroug GVT for WaaG by default.

Tracked-On: #4625
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
2020-04-15 15:28:14 +08:00
Conghui Chen 84ad340898 hv: fix for waag 2 core reboot issue
Waag will send NMIs to all its cores during reboot. But currently,
NMI cannot be injected to vcpu which is in HLT state.
To fix the problem, need to wakeup target vcpu, and inject NMI through
interrupt-window.

Tracked-On: #4620
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-04-15 14:42:00 +08:00