When run 'acrnctl add launch_script.sh', vmname will be detected from
the launch script and stored in vmmngr_struct.name[MAX_VM_OS_NAME_LEN],
so vmname should not be longer than MAX_VM_OS_NAME_LEN.
Tracked-On: #2851
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Length of vmname is restricted to MAX_VM_OS_NAME_LEN. Keep it
coincide with VM name array size in vm_config.
Tracked-On: #2851
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
The vm_config in hypervisor restricted VM name size to
MAX_CONFIG_NAME_SIZE (32 bytes). When UOS is launched by DM, the vmname
is passed in as the last optional args, we hope to to copy it to vm_config
in the future. So the size of vmname in DM args should be restricted to
MAX_CONFIG_NAME_SIZE, too. Because MAX_CONFIG_NAME_SIZE will be used by DM,
we move it from vm_config.h to acrn_common.h
We also rename MAX_CONFIG_NAME_SIZE to MAX_VM_OS_NAME_LEN, because it will
be used by another components, should has a clear name.
Tracked-On: #2851
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
devicemodel/include/public/acrn_common.h should be identical with
hypervisor/include/public/acrn_common.h, so we can use a soft link
to hypervisor's acrn_common.h for devicemodel.
Tracked-On: #2851
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
smbios table is not required so remove it.
Tracked-On: #2577
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
Since we always enable "Use TPR shadow", so operate on TPR will not
trigger VM exit. So remove these APIs.
Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Guest OS (e.g. Linux) may rely on a gap in E820 map in the 32-bit memory
space to determine the MMIO space for its PCI devices. Leave this gap
when building E820 map to keep the guest's PCI subsystem working.
After commit 7752d5cfe3d11ca0bb9c673ec38bd78ba6578f8e, Linux kernel no
longer requires the MMCONFIG region to be reserved in the E820 map.
Nonetheless, keep it in the reserved region to be on the safe side.
Tracked-On: #2843
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
Delete the 2 files and merge their code into vpci.c:
hypervisor/dm/vpci/partition_mode.c
hypervisor/dm/vpci/sharing_mode.c
And change the Makefile accordingly
Change PCI_PRIV_H_ to VPCI_PRIV_H_ in vpci_priv.h
Some misra c fix:
Add @pre for functions
Add const to function parameters
Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Instead of using CONFIG_PARTITION_MODE at compile time to compile in and call
the partition mode/sharing mode specific functions, always compile in all sharing
mode and partition code, then calling the corresponding functions dynamically based
on vm type (PRE_LAUNCHED_VM and SOS_VM) at runtime.
Some misra c fix:
Add @pre for functions
Add const to function parameters
Add ASSERT in pci_cfgdata_io_read and pci_cfgdata_io_write
Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Re-organize the code to remove usage of hypervisor.h from
bsp folder, without changing any functionality.
Tracked-On: #2694
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
Update the instructions on how to increase the size of a UOS disk image so that
the entire operation can be performed on the development host. This has the
advantage that it can be done completely offline (the UOS must be powered off
in fact) and no extra tools need to be installed in the UOS to do this.
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
For open source, just need to refer FuSa standard instead
of listing concrete fulfillment matrix.
Add related FuSa standard reference and remove related
fulfillment matrix.
V1-->V2:
Make reference more clear according to David'comments
Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Currently MSR IA32_MISC_ENABLE is passthrough to guest.
However, guest may change the value of this MSR, which will cause issue in hypervisor.
This patch uses VMX MSR store area to isolate the MSR IA32_MISC_ENABLE between guest and host.
TODO:
Some bits of the MSR IA32_MISC_ENABLE is not just per core, but per package.
So need to check if need to prevent guest from setting or clearing these bits that may affect other cores.
Tracked-On: #2834
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Rename the field msr_num to msr_index, which is more accurate,
in struct msr_store_entry.
Tracked-On: #2834
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
-- move this api from misc.c to timer.c to avoid
reverse dependency, and remove misc.c
Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
- for all cases of referring guest bootargs size, replace MEM_2K with
CONFIG_MAX_BOOTARGS_SIZE for better readability.
- remove duplicated MAX_BOOTARGS_SIZE definition from vm_config.h.
Also fix one minor issue in general_sw_loader() which uses copy_to_gpa()
to copy a string. Since copy_to_gpa() makes use of memncpy_s() to do the
job, the size parameter should include the string null ternimator.
Tracked-On: #2806
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
print each IRQ descriptor interrupts number and all of IRQ descriptors
interrupts when UOS requests or releases a GPIO IRQ.
Tracked-On: #2512
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
Support reading GPIO value when the GPIO switches to IRQ mode.
Tracked-On: #2512
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
GPIO IRQ controller emulation is used to handle level trigger and
edge trigger interrupts. Use GPIO IRQ virtqueue to handle IRQ chip
operations and GPIO event virtqueue to indicate IRQ source to UOS.
Tracked-On: #2512
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
add the GPIO IRQ definitions, and implement the GPIO IRQ
initialization and deinitialization.
Tracked-On: #2512
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
There are two virtqueues for irq, one for handling the operations of
front-end irq controller and the other for triggering the interrupt.
Tracked-On: #2512
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
Remove the unused seed parsing source files under
hypervisor/boot/sbl and related header files.
Tracked-On: #2724
Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Added a struct acrn_vm in firmware.h to remove
a compiler warning.
No change in logic.
Tracked-On: #2830
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
OVMF requires a more descriptive mechanism than RTC CMOS to retrieve
ACRN's memory layout, so we now pass the E820 map to it, starting at
0xEF000 (ROM area).
ACRN currently uses [4GB, 5GB) as its 64-bit PCI host aperture. This is
inconsistent with OVMF's assumption of its platform's memory layout,
because it derives the size of high memory from RTC CMOS, which is
incapable of describing the 64-bit PCI hole.
By default, OVMF uses RTC CMOS 0x5b/0x5c/0x5d to determine the size of
high memory. This value only tells OVMF how much memory is above 4GB,
but not the platform's memory layout above 4GB.
Using RTC CMOS works for QEMU, because QEMU places its 64-bit PCI host
aperture above its highmem. Therefore, OVMF can always assume highmem is
located at [4GB, 4GB + highmem), which is not where ACRN's highmem is
located. For example, if we have 1GB of usable memory above 4GB, ACRN
will place it at [5GB, 6GB).
This change allows OVMF to correctly identify the guest's memory layout.
It will consider any reserved region above 4GB as 64-bit PCI host
aperture.
MP table, SMBIOS and ACPI tables are all located above 0xF0000 so it is
guaranteed that there is no overlap. There can only be a maximum of 128
E820 entries.
v1 -> v2:
- provide more explanation to this commit
- add signature before E820 map for OVMF backward compatibility
Tracked-On: #2792
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
While building the E820 map for UOS, [lowmem, lowmem_limit) and [5GB,
highmem) can be empty. Remove the empty entries if they appear.
Tracked-On: #2792
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
- fix comments
- update the first RAM region to [0, 0xA0000) because [0xA0000, 1MB) is
designated as video memory and ROM area
- use 2GB as lowmem_limit
Tracked-On: #2792
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
Add the PCI MMIO fallback handler to the 64-bit PCI host aperture, so
that the guest won't inadvertently crash acrn-dm due to unhandled MMIO.
Tracked-On: #2792
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
- use strncmp() instead of comparing string pointers to make no
assumptions about the toolchain's literal pool
- re-shuffle the functions so they're consistent with mem.h
- make non-public functions static
- increase code re-use
Tracked-On: #2792
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
Per commit dbd9ab07e1, GUEST_CFG_OFFSET is
no longer needed.
Tracked-On: #2792
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
This patch add tutorial about using zephyr as guest.
Tracked-On: #2713
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
---
v3 -> v4:
- Addressed two minor comments from David
v2 -> v3:
- Detail section `Build Zephyr`
- Add missing sudo
- Automatically boot zephyr
- Other grammar, phrasing fix
v1 -> v2:
- NUC7i5DNH -> NUC7i5DNHE.
- Add note about doc to build acrn supported zephyr image.
- Refine section `Boot Zephyr as User OS`.
- Some minor fix.
Enhance the ACRN shell interactive help. It is close to a 1-1 mapping with
the online documentation but cut a little shorter in various places to make it
more user-friendly when using it from the ACRN console.
Tracked-On: #2829
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
To merge the multiboot bootargs within sbl_init_vm_boot_info(), buffer
overflow could happen when it doesn't provide correct 'dmax' argument
to strncpy_s().
Also, currently it doesn't check the availability of the dest buffer before
overwriting '\0' with a whitespace, which theoretically the dest string
could end up with no null terminator within it's array boundary.
This patch also creates a separate function to merge the cmdline strings,
because after the above fixes some lines in sbl_init_vm_boot_info()
function could have up to 7 tabs in front of the first character, which
looks messy and sbl_init_vm_boot_info() is getting too complicated.
Tracked-On: #2806
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Linux access TSC_ADJUST to verify it has not tampered every time when enter idle.
So for RTVM running rt-linux, the access will cause vm exit which affect real-time performance.
This commit pass through TSC_ADJUST to VM with lapic_pt, to avoid TSC_ADJUST caused vm_exit.
For other VMs, TSC_ADJUST msr access is still trapped and emulated.
Tracked-On: #2813
Signed-off-by: Yan, Like <like.yan@intel.com>
This patch hide Memory Protection Extention (MPX) capability from guest.
- vCPUID change:
Clear cpuid.07H.0.ebx[14]
Clear cpuid.0DH.0.eax[4:3]
- vMSR change:
Add MSR_IA32_BNDCFGS to un-supported MSR array.
- XCR0[4:3] is not allowed to set by guest.
Tracked-On: #2821
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Both sharing mode and partition mode should follow the same coding logic/style
for similar functions:
vdev cfgread/cfgwrite: should all return -ENODEV if the pci reg access is not handled by
it, but previously the partition mode code is not following this logic
vpci cfgread/cfgwrite: if the vdev cfgread/cfgwrite does not handle this reg,
pass on to next vdev cfgread/cfgwrite, if no vdev handles that req, passthru to
physical pci device
Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Do the pci cfg read/write sanity checking before the request is dispatched to
submodules, so that the checking is centralized rather than scattered across multiple
files/places
Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
In preparation for vpci ops function removal, so that these functions can be
called directly instead by vpci code
Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Remove vdev ops for partition mode, change related code to directly call the corresponding
functions instead
Remove struct pci_vdev_ops from vpci.h
Add @pre for pci_find_vdev_by_pbdf and pci_find_vdev_by_vbdf/partition_mode_vpci_init
Change the return value from int32_t to void to comply with misra c and
add ASSERT/panic in the functions (if necessary):
vdev_hostbridge_init
vdev_hostbridge_deinit
vdev_pt_init
vdev_pt_deinit
Still use pr_err in partition_mode_cfgread and partition_mode_cfgwrite to check if vdev cfgread/cfgwrite
access is aligned on 1/2/4 bytes, which is the only case that vdev cfgread/cfgwrite will return
nonzero, pr_err will be removed in subsequent patch titled "unify the sharing
mode and partition mode coding style for similar functions"
Remove @pre for local variables
Add ASSERT in partition_mode_pdev_init to check if pdev is NULL (user config
error)
Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
ACRN uses global invalidation for all DMAR translation caches. Whenever
a UOS is shutdown or rebooted, it ends up clearing entries in translation
caches belonging to other VMs/domains. This patch adds support for
domain/device level invalidation for DMA translation caches and index
based invalidation for Interrupt Remapping Cache.
Tracked-On: #2738
Signed-off-by: Sainath Grandhi sainath.grandhi@intel.com
Acked-by: Eddie Dong eddie.dong@intel.com
yuhong.tao@intel.com