For post-launched RTVM, the acrn-dm can own PMU_PASSTHROUGH flag; for
pre-launched RTVM, need set it in configuration file by default.
Tracked-On: #6966
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
A shared memory region can be provided either by the hypervisor or by the
device model. Before recent schema changes this is telled by the "hv:/" or
"dm:/" prefix.
This patch adds another node under an IVSHMEM region to represent the
provider, following the practice that information in the old-school
encodings is split and put as separate XML nodes.
Tracked-On: #6690
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
As is recommended by UX/DX reviews, the per-VM console virtual UART is now
limited to the following choices:
- Disabled
- a COM port from COM1 to COM4
- PCI based
This patch converts the schema of scenario XMLs to integrate this
recommendation and add logic in the scenario upgrader to migrate data from
old scenario XMLs.
v1 -> v2:
* Update the static allocators and C source transformers according to the
new console vUART config item.
Tracked-On: #6690
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
We have redesign the vuart and the UI for user, so the config tool
should change the schema and xform for the new xml, then change the
static_allocators to alloc irq and io_port for new connection.
This patch add a new vuart connection type and change the xforms to
adapter the new type.
Tracked-On: #6690
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Chenli Wei <chenli.wei@linux.intel.com>
The concept of guest_flags is hard to understand for users.
So turn guest_flags into several parameters in config tool
user interface, list as below:
GUEST_FLAG_LAPIC_PASSTHROUGH ---> lapic_passthrough
GUEST_FLAG_IO_COMPLETION_POLLING ---> io_completion_polling
GUEST_FLAG_VCAT_ENABLED ---> virtual_cat_support
GUEST_FLAG_SECURE_WORLD_ENABLED ---> secure_world_support
GUEST_FLAG_HIDE_MTRR ---> hide_mtrr_support
GUEST_FLAG_NVMX_ENABLED ---> nested_virtualization_support
GUEST_FLAG_SECURITY_VM ---> security_vm
GUEST_FLAG_RT ---> vm_type(RTVM)
GUEST_FLAG_TEE ---> vm_type(TEE_VM)
GUEST_FLAG_REE ---> vm_type(REE_VM)
In addition, HV global parameter NVMX_ENABLE is removed
from user interface, when config tool detects more than
one VM with nested_virtualization_support, NVMX_ENABLE is
assigned as 'y' automatically.
v1->v2:
*Rebase on the latest xml schema checking change
*Remove "all rights reserved" from the license header in guest_flags.py
v2->v3:
*Change the name of the new config items to CAPITAL_CASE style
*Combine guest flag policy to an XPATH in guest_flags.py
*Use count() to directly deduce NVMX_ENABLED in config_common.xsl and
update `boolean-by-key-value` to process 'true'
v3->v4:
*Change the name of the new config items to lower_case style
*Change guest_flag_node to allocation_vm_node in guest_flags.py
*Separate value case and key case for boolean-by-key-value
Tracked-On: #6690
Signed-off-by: hangliu1 <hang1.liu@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
This patch includes:
1.add load_order(PRE_LAUNCHED_VM/SERVICE_VM/POST_LAUNCHED_VM) parameter
2.change vm_type parameter to values as RTVM, STANDARD_VM, TEE, REE
TEE and REE are hide in UI.
3.deduce vm severity in vm_configuration from vm_type and load_order
This patch not includes:
change for scenario_config and functions called by scenario_config about checking
v2->v3:
*Refine template load_order
v1->v2:
*Change variable name from vm_type to load_order
*Change LoadOptionType to LoadOrderType
*Change VMOptionsType to VMType
*Add TEE_VM/REE_VM description
*Refine acrn:is-pre-launched-vm
Tracked-On: #6690
Signed-off-by: hangliu1 <hang1.liu@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
According to the new design of DX, implement ivshmem configuration
and generate hv related files.
Tracked-On: #6690
Signed-off-by: Yuanyuan Zhao <yuanyuan.zhao@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Not all pci hostbridge has a device on it. Remove the logic which
assumes there is at least one device.
Tracked-On: #7077
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
The interrupt pin descriptors in board XML follows the same notation as in
ACPI PRT (PCI Routing Table), i.e. either an integer or a pair of a device
object and an index.
However, the current static INTx allocator recognizes
integer-as-interrupt-line only, which will cause build-time failure if
the "device object + index" notation is used in physical DSDT to describe
PCI interrupt pin routing.
This patch refines the static allocator so that both notations can be
parsed properly. In case an interrupt line descriptor in the board XML
refers to an device object without an index, it is interpreted as the first
of the ACPI device object if it is an interrupt resource.
Tracked-On: #7058
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
If the user installed the lib python package in the host machine,
it will fail to build acrn hypervisor since the same package named lib is
also used in acrn config tool(static_allocators/lib).
So we add the __init__.py file under the static_allocators/lib directory
to fix the error.
Tracked-On: #7001
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Extract the max pci bus number from board information and generate the
common configuration macro ACFG_MAX_PCI_BUS_NUM automatically.
Tracked-On: #6942
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Get the integrated GPU bdf by looking for device from board.xml and extract the
BDF from device address.
Tracked-On: #6855
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
1. remove CONFIG_KATA_VM, CONFIG_MAX_KATA_VM_NUM and KATA_VM
related code.
2. remove KATA_VM in scenario xml files.
3. remove KATA vm type in UI.
4. remove UUID DB.
5. remove uuid in the launch script generation logic.
6. use vmname to identify a vm. (eg: <name>ACRN_SOS_VM</name>)
add the check logic to ensure vm name is a must-set item, not duplicated,
and the string length is [1-15] and the whitespace is not allowed.
7. enlarge the max VM num to 32.
Tracked-On: #6685
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
The pre-rtvm uses the RTCT tab to determine it's SSRAM address.
It was origionally duplicated from the host, and keeped its address
and layout.
To move the SSRAM area in ve820, we have to modify the guest's RTCT
tab first.
This patch uses the board_inspector's RTCT module to parse the host's
RTCT tab, and calculate the offset, then modifies the SSRAM/bin enties,
and saves it to the new RTCT bin file.
Tracked-On: #6674
Signed-off-by: Zhou, Wu <wu.zhou@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Rename SOS_VM type to SERVICE_VM
rename UOS to User VM in XML description
rename uos_thread_pid to user_vm_thread_pid
rename devname_uos to devname_user_vm
rename uosid to user_vmid
rename UOS_ACK to USER_VM_ACK
rename SOS_VM_CONFIG_CPU_AFFINITY to SERVICE_VM_CONFIG_CPU_AFFINITY
rename SOS_COM to SERVICE_VM_COM
rename SOS_UART1_VALID_NUM" to SERVICE_VM_UART1_VALID_NUM
rename SOS_BOOTARGS_DIFF to SERVICE_VM_BOOTARGS_DIFF
rename uos to user_vm in launch script and xml
Tracked-On: #6744
Signed-off-by: Liu Long <long.liu@linux.intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
1. remove HV_RAM_SIZE and CONFIG_HV_RAM_SIZE in the related python
code, schema and all existing scenario XMLs because PR 6664 has
changed it in HV side.
2. set HV_RAM_START default value to 2M.
Tracked-On: #6663
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Remove the restriction that SERIAL_CONSOLE needs to be ttys0, ttys1,
ttys2 or ttys3.
1. Lossen the restriction in xsd.
2. Rewrite the document.
3. Refine the intx.py. Refine the logic which take effect if the <irq>
is specified in "SOS_COM#_IRQ" for SOS VM's legacy vuart 0.
Tracked-On: #6610
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
If a legacy vuart base is configured as "CONFIG_COM_BASE", allocate a
base with unused io-port address with length 0x10.
The post-launched VM's unused io-port address range is [0xD00, 0xFFFF].
The pre-launched VM's unused io-port address range is [0xD00, 0xFFFF]
but the passthrough devices' io-port address are reserved.
The SOS VM's unused io-port address range is [0xD00, 0xFFFF] but any
native devices' io-port address are reserved. However, the io-port
address which is passed through to any pre-launched is reusable.
Tracked-On: #6652
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Expand the capacity of legacy vuarts per VM. This change is applied to
manual scenario xml editing only.
A SOS VM can choose io port 0x3F8, 0x2F8, 0x3E8, 0x2E8 by selecting
SOS_COM1_BASE, SOS_COM2_BASE, SOS_COM3_BASE, SOS_COM4_BASE respectively.
Non SOS VM can choose io port 0x3F8, 0x2F8, 0x3E8, 0x2E8 by selecting
COM1_BASE, COM2_BASE, COM3_BASE, COM4_BASE respectively.
For any type of VM, selecting "CONFIG_COM_BASE" allows configuration tool
to pick an available io port from hardcoded list:
['0xA000', '0xA010', '0xA020', '0xA030', '0xA040', '0xA050', '0xA060', '0xA070']
A SOS VM can choose irq 4 by selecting SOS_COM1_IRQ and SOS_COM3_IRQ, and choose irq 3 by selecting SOS_COM2_IRQ and SOS_COM4_IRQ.
Non SOS VM can choose irq 4 by selecting COM1_IRQ and COM3_IRQ, and choose irq 3 by selecting COM2_IRQ and COM4_IRQ.
For SOS VM, selecting "CONFIG_COM_IRQ" allows configuration tool
to pick an available irq based on AVAILABLE_IRQ_INFO. For non SOS VM, it
will allocate an available irq from [1, 15].
Tracked-On: #6652
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Pass through the io-ports for the passthrough pci devices of
pre-launched VM.
Three parts to support this feature:
1. Identical map the pci devices io-port address for pre-launched VM
2. Set the io-ports address range to DSDT
3. Avoid to allocate the bar index for VMSIX
Tracked-On: #6620
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
The term PSRAM is now obsoleted and should be replaced with SSRAM, as has been
done by commit 9facbb43b3 ("config-tool: rename PSRAM to SSRAM"). However,
there are two places in the configuration toolset that still uses PSRAM. This
patch updates these missed occurrences accordingly.
Tracked-On: #6012
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
There could be multiple ways in the scenario configuration to specify that
no INTx allocation is explicitly allocation to a prelaunched VM:
* Do not have a `pt_intx` node at all.
* Have a `pt_intx` node with no text.
* Have a `pt_intx` node with a text that has nothing but whitespaces,
tabs and newlines.
The current implementation only supports the first way, and will cause
build-time failures when a scenario configuration uses the latter two. The
following changes are introduced by this patch to fix such errors.
* The INTx static allocator queries the text() of `pt_intx` nodes
directly to gracefully handle `pt_intx` nodes with no text.
* The XSLT of pt_intx.c clears all kinds of white spaces from the text of
`pt_intx` nodes before calculating the set of allocated INTx mappings.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
If passthrough TPM2 is enabled and the log area is present, allocates
the log_area_start_address with the size log_area_minimum_length(256K).
Tracked-On: #6320
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
This patch allocates interrupt lines among VMs according to the PCI devices
assigned to them.
v1 -> v2:
* Remove the usage of VMx_PT_INTX_NUM macro in vm_configuration.c; use the
concrete numbers directly.
* The static allocator will also complain if any interrupt line is allocated to
a VM with LAPIC_PASSTHROUGH.
v2 -> v3:
* Fix a minor coding style issue.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
It is a common practice to parse PCI BDF in the static allocators. This
patch moves the BusDevFunc class (which is a named tuple encoding a BDF) to
lib.py and uses it for BDF parsing throughout the static allocators.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds interrupt pin related information into the board XML,
including:
* The PCI routing table in ACPI DSDT/SSDT are parsed and generated into
the board XML as "interrupt_pin_routing" nodes.
* IRQs encoded in _CRS directly are represented as resources of type
"irq".
* Interrupt lines (i.e. INTx#) of PCI devices are represented as
resources of type "interrupt_pin". When the PCI routing table is
available, the corresponding interrupt line is identified and
represented as the "source" attribute of the resource node.
Due to the existence of vIOAPIC in ACRN VMs, the board inspector interprets
the \_PIC method with parameter 1 to inform the ACPI namespace that the
interrupt model should be in APIC mode.
v1 -> v2:
* Remove the msi_enable variable which is defined but never used.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
A vmsix supported passthrough device expects the first unused bar region
for vmsix. Pop the first unused_bar_index in gpa.py instead.
Reference code: init_vmsix_on_msi of hypervisor\dm\vpci\vmsix_on_msi.c
Tracked-On: #6192
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Assign bdf to pci emulated and passthrough devices.
For pre-launched VM, assigns unique bdf to passthrough devices, inter-vm
shared memory, pci vuart(console and communication vuarts).
For SOS vm, assigns unique bdf to inter-vm shared memory and pci
vuart(console and communication vuarts).
The bdf follows the rules below:
- the bdf 00:00.0 is reserved for pci hostbridge
- the assigned bdf range: bus is 0x00, dev is in range [0x1, 0x20)
and the fuc is 0x00
- the bdf must be unique, which means any vm's emulated devices cannot
share the same bdf with existing devices
- some devices's bdf is hardcoded, modify its bdf would leads the
device cannot be dicoverd by os. A HARDCODED_BDF_LIST in bdf.py documents
them
- the passthrough devices' bdf can be reused in SOS vm
Tracked-On: #6024
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add methods allocates the mmio bar base to console vuart,
communication vuarts, inter-vm shared memory and passthrough pci
devices.
For SOS:
- get low mem by parsing board xml.
- get high mem by parsing board xml, if the high mem is not enabled,
the high mem start address would be ~0UL and the end address is 0UL
- get the occupied mmio windows by parsing board.xml
- for each console vuart, communication vuart and inter-vm shared memory
devices, assign unused mmio windows to them
- all the assigned mmio windows must be unique and should not overlay
with any devices' mmio window
- the passthrough devices mmio windows can be reused in SOS vm
- each allocated mmio start address must be 4k alignment if the length
of bar is smaller than 4k
- each allocated mmio start address must be aligned with the bar length
if its length is greater than 4k
- the 32bits bar will fall in low mem range only
- 64bits bar will look for free mmio in low mem rage first, if the high
mem is enabled, the 64bits bar will look for free mmio in high mem
range if there is not enough space in low mem range
- allocator raises an error if there is not enough mmio space
For pre-launched VM:
- the high mem range is [256G, 512G)
- the low mem range is [2G, 3.5G)
- there is no used mmio window initially
- for each console vuart, communication vuart, inter-vm shared memory
devices and passthrough devices, assign unused mmio windows to them
- all the assigned mmio windows must be unique and should not overlay
with any devices' mmio window
- the 32bits bar will fall in low mem range only
- 64bits bar will look for free mmio in low mem rage first and then
look for free mmio in high mem range if there is not enough space in
low mem range
- each allocated mmio start address must be 4k alignment if the length
of bar is smaller than 4k
- each allocated mmio start address must be aligned with the bar length
if its lenght is greater than 4k
- allocator raises an error if there is not enough mmio space
Tracked-On: #6024
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add a common method "get_shmem_regions":
This method get <IVSHMEM_REGION> and extracts the region size, region
position in xml and and vm ids which share this regions. Returns a
dictionary:
{'vm_id':{'region_name':{'id': region position,'size': region size,}}}
Add vm type checking methods:
is_pre_launched_vm, is_post_launched_vm and is_sos_vm.
Tracked-On: #6024
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
This patch adds support to parse RTCT v2 using the refined board XML
schema. The major changes include:
- Add the RTCT v2 parser in the acpiparser module. The version of an RTCT
is detected automatically to choose the right parser.
- Extract software SRAM capabilities of caches into the board XML.
- Move the logic that determines the software SRAM base address for the
pre-launched VM to the static allocator of GPAs.
- Generate software SRAM related macros into misc_cfg.h when necessary.
Tracked-On: #6020
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This file allocates the resource of pio base.
The available pio base is in ['0x3F8', '0x2F8', '0x3E8', '0x2E8'] and it
cannot be used by native device.
When any of sos legacy vuarts are enabled, assign a pio base to legancy
vuarts' base.
The allocator follows rules:
1. An SOS legacy vuart only support PIO vuart.
2. To assign a pio base for sos legacy vuart 0:
- If the hv/DEBUG_OPTIONS/SERIAL_CONSOLE is one of
[ttys0, ttys1, ttys2, ttys3] and it's a pio vuart in the native
environment, the pio base of SOS legacy vuart 0 would be the same as
native one.
- If the hv/DEBUG_OPTIONS/SERIAL_CONSOLE is not one of
[ttys0, ttys1, ttys2, ttys3], assigns a pio base to SOS legacy vuart 0
from avilable pio base.
- If the hv/DEBUG_OPTIONS/SERIAL_CONSOLE is not one of
[ttys0, ttys1, ttys2, ttys3] but a pio vuart, will assigns a pio
base to SOS legacy vuart 0 from avilable pio base and raise a
warning to user.
3. To assign a pio base for sos legacy vuart 1:
- Assigns a pio base to SOS legacy vuart 1 from avilable pio base.
- If all the available pio bases list is empty (which means all are
in used by native), it assigns one of the pio base to SOS legacy
vuart 1 anyway, but raise a warning to user.
4. Assigned pio bases must be unique.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Create an intx.py which is a static allocator to allocate the irq
resources. The available irq list is based on the native irqs which
are in range [0, 15] and are not used by native os.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
If a cpu_affinity node of SOS is not present in the scenario.xml,
assign the native cpus which are not assigned to pre-launched vm to
SOS vm.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Refine the "append_node" which can add new node with an attribute and
return the appended node.
The method "get_node" finds the xpath value and return it if there is an
unique node exists, otherwise it returns None.
It is used to get an xpath element node or can determine the xpath existence.
The "get_text" is replaced with "get_node". The only get_text in
hv_ram.py is modified accordingly.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Create lib.py which contains the common methods that are shared by static
allocators under misc/config_tools/static_allocators.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Create a file which contains user-defined errors for config-tools.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
add 2 * max (IVSHMEM_SHM_SIZE, 2M) in HV_RAM_SIZE calculation to
avoid ram overflow caused by additional memory usage for shared
memory alignment.
Tracked-On: #5955
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
update HV_RAM_SIZE calculation algorithm to 20MB + VM number*
16MB, which consists of text segment rodata(2MB), bss data(about
1MB), bss.ppt_pages(2.4MB), bss.ctx_tables(6MB), bss.vm_array(
3.2MB), bss.ivshmem_base(2MB+1.8MB for alignment) and
bss.post_uos_sworld_memory(16MB*post-launched VM number).
Tracked-On: #5927
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
Remove vm_configs folder and move all the XML files and generic code example into config_tools/data
Tracked-On: #5644
Signed-off-by: Xie, nanlin <nanlin.xie@intel.com>
Minggui Cao