config-tool: find pci hole based on all pci hostbridge
Not all pci hostbridge has a device on it. Remove the logic which assumes there is at least one device. Tracked-On: #7077 Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com> Reviewed-by: Junjie Mao <junjie.mao@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com>
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@ -301,25 +301,17 @@ def get_pt_devs_io_port_passthrough(board_etree, scenario_etree):
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return dev_list
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def get_pci_hole_native(board_etree):
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resources = board_etree.xpath(f"//bus[@type = 'pci']/device[@address]/resource[@type = 'memory' and @len != '0x0']")
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resources_hostbridge = board_etree.xpath("//bus/resource[@type = 'memory' and @len != '0x0' and not(starts-with(@id, 'bar')) and not(@width)]")
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low_mem = set()
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high_mem = set()
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for resource_hostbridge in resources_hostbridge:
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start = resource_hostbridge.get('min')
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end = resource_hostbridge.get('max')
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if start is not None and end is not None and int(start, 16) >= PCI_HOLE_THRESHOLD:
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for resource in resources:
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resource_start = int(resource.get('min'), 16)
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resource_end = int(resource.get('max'), 16)
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if resource_start >= int(start, 16) and resource_end <= int(end, 16):
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if resource_end < 4 * SIZE_G:
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low_mem.add(AddrWindow(int(start, 16), int(end, 16)))
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break
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else:
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high_mem.add(AddrWindow(int(start, 16), int(end, 16)))
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break
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if int(end,16) < 4 * SIZE_G:
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low_mem.add(AddrWindow(int(start, 16), int(end, 16)))
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else:
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high_mem.add(AddrWindow(int(start, 16), int(end, 16)))
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return list(sorted(low_mem)), list(sorted(high_mem))
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def get_io_port_range_native(board_etree):
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