Commit Graph

354 Commits

Author SHA1 Message Date
Liu,Junming a83d880f11 dm: update the GPU OpRegion size to 20KB
The address of OpRegion is not 4KB aligned,
if the OpRegion + extended VBT size is 16KB,
then it will take up to 5 physical pages in host.
So update the OpRegion size to 20KB
to expose the whole OpRegion to guest.

Tracked-On: #6270

Signed-off-by: Liu,Junming <junming.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-08-19 13:09:21 +08:00
Shuo A Liu 7947b4dae8 doc: Adapt documents to new HSM driver
Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
2021-07-15 11:53:54 +08:00
Shuo A Liu 07381888d3 dm: Use the new HSM eventfd ioctls
IC_EVENT_IOEVENTFD		->	ACRN_IOCTL_IOEVENTFD
IC_EVENT_IRQFD			->	ACRN_IOCTL_IRQFD

Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
2021-07-15 11:53:54 +08:00
Shuo A Liu 6e0b12180c hv: dm: Use new power management data structures
struct cpu_px_data		->	struct acrn_pstate_data
struct cpu_cx_data		->	struct acrn_cstate_data
enum pm_cmd_type		->	enum acrn_pm_cmd_type
struct acpi_generic_address	->	struct acrn_acpi_generic_address
cpu_cx_data			->	acrn_cstate_data
cpu_px_data			->	acrn_pstate_data

IC_PM_GET_CPU_STATE		->	ACRN_IOCTL_PM_GET_CPU_STATE

PMCMD_GET_PX_CNT		->	ACRN_PMCMD_GET_PX_CNT
PMCMD_GET_CX_CNT		->	ACRN_PMCMD_GET_CX_CNT
PMCMD_GET_PX_DATA		->	ACRN_PMCMD_GET_PX_DATA
PMCMD_GET_CX_DATA		->	ACRN_PMCMD_GET_CX_DATA

Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
2021-07-15 11:53:54 +08:00
Shuo A Liu 98c80d75b8 hv: dm: Use new virtual device management ioctls
IC_ADD_HV_VDEV		->	ACRN_IOCTL_CREATE_VDEV
IC_REMOVE_HV_VDEV	->	ACRN_IOCTL_DESTROY_VDEV
struct acrn_emul_dev	->	struct acrn_vdev

Also, move struct acrn_vdev to acrn_common.h as this structure is used
by both DM and HV.

Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
2021-07-15 11:53:54 +08:00
Shuo A Liu 9e7abbb38c dm: Use new MMIO device passthrough management ioctls
IC_ASSIGN_MMIODEV	->	ACRN_IOCTL_ASSIGN_MMIODEV
IC_DEASSIGN_MMIODEV	->	ACRN_IOCTL_DEASSIGN_MMIODEV

struct acrn_mmiodev has slight change. Move struct acrn_mmiodev into
acrn_common.h because it is used by both DM and HV.

Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
2021-07-15 11:53:54 +08:00
Shuo A Liu 3625eb7a99 hv: dm: Use new pci device passthrough management ioctls
IC_ASSIGN_PCIDEV		->	ACRN_IOCTL_ASSIGN_PCIDEV
IC_DEASSIGN_PCIDEV		->	ACRN_IOCTL_DEASSIGN_PCIDEV
QUIRK_PTDEV			->	ACRN_PTDEV_QUIRK_ASSIGN
struct acrn_assign_pcidev	->	struct acrn_pcidev

Move struct acrn_pcidev into acrn_common.h because it is used by both
DM and HV.

Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
2021-07-15 11:53:54 +08:00
Shuo A Liu 9d67745037 dm: Use new ptdev interrupt management ioctls
IC_SET_PTDEV_INTR_INFO	 ->	ACRN_IOCTL_SET_PTDEV_INTR
IC_RESET_PTDEV_INTR_INFO ->	ACRN_IOCTL_RESET_PTDEV_INTR
struct ic_ptdev_irq	 ->	struct acrn_ptdev_irq
IRQ_INTX		 ->	ACRN_PTDEV_IRQ_INTX
IRQ_MSI			 ->	ACRN_PTDEV_IRQ_MSI

Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
2021-07-15 11:53:54 +08:00
Shuo A Liu 7e01d90b87 dm: Use new memory management ioctls
struct vm_memmap	->	struct acrn_vm_memmap
VM_MEMMAP_SYSMEM	->	ACRN_MEMMAP_RAM
VM_MMIO			->	ACRN_MEMMAP_MMIO
PROT_ALL		->	ACRN_MEM_ACCESS_RWX

Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
2021-07-15 11:53:54 +08:00
Shuo A Liu 9c910bae44 hv: dm: Use new I/O request data structures
struct vhm_request		->	struct acrn_io_request
union vhm_request_buffer	->	struct acrn_io_request_buffer
struct pio_request		->	struct acrn_pio_request
struct mmio_request		->	struct acrn_mmio_request
struct ioreq_notify		->	struct acrn_ioreq_notify

VHM_REQ_PIO_INVAL		->	IOREQ_PIO_INVAL
VHM_REQ_MMIO_INVAL		->	IOREQ_MMIO_INVAL
REQ_PORTIO			->	ACRN_IOREQ_TYPE_PORTIO
REQ_MMIO			->	ACRN_IOREQ_TYPE_MMIO
REQ_PCICFG			->	ACRN_IOREQ_TYPE_PCICFG
REQ_WP				->	ACRN_IOREQ_TYPE_WP

REQUEST_READ			->	ACRN_IOREQ_DIR_READ
REQUEST_WRITE			->	ACRN_IOREQ_DIR_WRITE
REQ_STATE_PROCESSING		->	ACRN_IOREQ_STATE_PROCESSING
REQ_STATE_PENDING		->	ACRN_IOREQ_STATE_PENDING
REQ_STATE_COMPLETE		->	ACRN_IOREQ_STATE_COMPLETE
REQ_STATE_FREE			->	ACRN_IOREQ_STATE_FREE

IC_CREATE_IOREQ_CLIENT		->	ACRN_IOCTL_CREATE_IOREQ_CLIENT
IC_DESTROY_IOREQ_CLIENT		->	ACRN_IOCTL_DESTROY_IOREQ_CLIENT
IC_ATTACH_IOREQ_CLIENT		->	ACRN_IOCTL_ATTACH_IOREQ_CLIENT
IC_NOTIFY_REQUEST_FINISH	->	ACRN_IOCTL_NOTIFY_REQUEST_FINISH
IC_CLEAR_VM_IOREQ		->	ACRN_IOCTL_CLEAR_VM_IOREQ
HYPERVISOR_CALLBACK_VHM_VECTOR	->	HYPERVISOR_CALLBACK_HSM_VECTOR

arch_fire_vhm_interrupt()	->	arch_fire_hsm_interrupt()
get_vhm_notification_vector()	->	get_hsm_notification_vector()
set_vhm_notification_vector()	->	set_hsm_notification_vector()
acrn_vhm_notification_vector	->	acrn_hsm_notification_vector
get_vhm_req_state()		->	get_io_req_state()
set_vhm_req_state()		->	set_io_req_state()

Below structures have slight difference with former ones.

  struct acrn_ioreq_notify
  strcut acrn_io_request

Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
2021-07-15 11:53:54 +08:00
Shuo A Liu 3c66ba7ef5 dm: Use new interrupt management ioctls
IC_INJECT_MSI		->	ACRN_IOCTL_INJECT_MSI
IC_SET_IRQLINE		->	ACRN_IOCTL_SET_IRQLINE
IC_VM_INTR_MONITOR	->	ACRN_IOCTL_VM_INTR_MONITOR

Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
2021-07-15 11:53:54 +08:00
Shuo A Liu 107cae316a hv: dm: Use new ioctl ACRN_IOCTL_SET_VCPU_REGS
struct acrn_set_vcpu_regs	->	struct acrn_vcpu_regs
struct acrn_vcpu_regs		->	struct acrn_regs
IC_SET_VCPU_REGS		->	ACRN_IOCTL_SET_VCPU_REGS

Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
2021-07-15 11:53:54 +08:00
Shuo A Liu f476ca55ab hv: dm: Use new VM management ioctls
IC_CREATE_VM		->	ACRN_IOCTL_CREATE_VM
IC_DESTROY_VM		->	ACRN_IOCTL_DESTROY_VM
IC_START_VM		->	ACRN_IOCTL_START_VM
IC_PAUSE_VM		->	ACRN_IOCTL_PAUSE_VM
IC_RESET_VM		->	ACRN_IOCTL_RESET_VM

struct acrn_create_vm	->	struct acrn_vm_creation

Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
2021-07-15 11:53:54 +08:00
Shuo A Liu 3deb973b7a dm: Use new ioctl ACRN_IOCTL_GET_PLATFORM_INFO
IC_GET_PLATFORM_INFO	->	ACRN_IOCTL_GET_PLATFORM_INFO
struct acrn_vm_config	->	struct acrn_vm_config_header(DM only)
struct platform_info	->	struct acrn_platform_info

Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
2021-07-15 11:53:54 +08:00
Shuo A Liu 82fa2d6355 dm: Rename vhm_ioctl_defs.h to hsm_ioctl_defs.h
Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
2021-07-15 11:53:54 +08:00
Shuo A Liu 42989f753e dm: Remove header vmm.h
vmm.h has some unused definitions.

Keep the useful definitions and delete vmm.h

Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-07-15 11:53:54 +08:00
Shuo A Liu 21e095dda0 dm: Remove unused vm_create_vcpu() interface
The hypervisor creates vCPUs for a User VM in VM creation interface. The
vm_create_vcpu() interface is not needed anymore.

Remove vm_create_vcpu() from acrn-dm.

Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-07-15 11:53:54 +08:00
Shuo A Liu 6ae5f8388e dm: Remove the API version check
Interface version is not recommended in Linux kernel community. Please
check Documentation/driver-api/ioctl.rst for reasons.

Remove the unused API version check from acrn-dm.

Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-07-15 11:53:54 +08:00
Sun Peng 28509b61c9 dm: Add PCI IDS for EHL/TGL/ADL in GPU passthrough
Add PCI IDS for ElkhartLake/TigerLake/AlderLake in GPU DSM and OpRegion
passthrough.

Tracked-On: #6270
Signed-off-by: Sun Peng <peng.p.sun@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-07-02 09:50:05 +08:00
Yonghua Huang d0426fd249 dm: add RTCT v2 support for guest
The latest version of RTCT specification is version 2.

 This patch is to add RTCT v2 support for virtual RTCT
 of guest.

Tracked-On: #6020
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2021-06-01 10:41:51 +08:00
Yonghua Huang 69808297b1 dm: update vRTCT module to support new vLAPIC solution
Emulation of guest lapic ID has been enhanced to
 indicate the topology of vCPU hierarchy.

 This patch refine logic to build virtual RCTC_v1 table
 of guest to adapt above lapic ID changes.

Tracked-On: #6020
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2021-06-01 10:41:51 +08:00
Tao Yuhong c8ae79b332 DM: change 32-bit mmio limit to 3.5G
the VM 32-bit mmio window is 2G~3.5G

Tracked-On: #6011
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
2021-05-26 13:52:46 +08:00
dongshen 818c821d04 dm: acpi: retrieve physical APIC IDs and use them to fill in the ACPI MADT table
Two utility functions are copied and adapted from hyerpervisor:
ffs64
bitmap_clear_nolock

Two public functions are provided for future use (such as for RTCTv2)
pcpuid_from_vcpuid
lapicid_from_pcpuid

Tracked-On: #6020
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2021-05-26 11:23:06 +08:00
dongshen 6680208ed9 dm: vmmapi: augment the vm_get_config() vmmapi to include a struct platform_info* parameter
This allows users to retrieve and use the requested platform_info information from hypervisor

Tracked-On: #6020
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2021-05-26 11:23:06 +08:00
Peter Fang 66b92f3f4e dm: add allow_trigger_s5 mode to pm_notify_channel uart
A user can use "--pm_notify_channel uart,allow_trigger_s5" to indicate
the User VM is allowed to trigger system S5.

"--pm_notify_channel uart" means a vuart channel will be created in the
User VM to allow communication with the VM's life_mngr. The Service VM
can then initiate S5 in the guest via its dm's monitor interface. The
additional option, "allow_trigger_s5", will create a socket connection
with the Service VM's life_mngr, allowing this VM to initiate system S5.

v1 -> v2:
- rename pm_notify_channel type to PWR_EVENT_NOTIFY_UART_TRIG_PLAT_S5

Tracked-On: #6034
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-05-21 10:16:30 +08:00
Rong Liu df64877c50 dm: PTM: Check PTM root has more than one child
Add one more sanity check: If the root port has more than
	one child, we won't enable PTM on the guest.
	This is not necessarily an error.  We flag it as
	error just because we don't have this type of hw
	configuration at development time thus this configuration
	is not tested.

Tracked-On: #5915
Signed-off-by: Rong Liu <rong.l.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2021-05-19 13:54:24 +08:00
Rong Liu 7e93f31e2c dm: PTM: Add virtual root port to vm
If PTM can be enabled on passthru device, a virtual root port
	is added to vm to act as ptm root.  And the passthru device is
	connected to the virtual root port instead of the virtual host bridge.

Tracked-On: #5915
Signed-off-by: Rong Liu <rong.l.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2021-05-19 13:54:24 +08:00
Rong Liu d5d792aa96 dm: PTM: Check if hw supports ptm
This patch probes whether hw supports ptm.  It is used to check whether ptm
	can be enabled on the passthru pci device.  It checks whether passthru
	device support PTM requestor capability, then check whether its upstream
	root port support PTM root role.  Errors are reported to user if sanity
	check fails.

Tracked-On: #5915
Signed-off-by: Rong Liu <rong.l.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2021-05-19 13:54:24 +08:00
Rong Liu a7b0d9848f dm: PTM: Get # of children of a pci bridge or pci bus
Add functionality to build and cache pci hierarchy, which are mainly
    used to retrieve # of children of pci bridge or pci bus.

    get_device_count_on_bus(): get # of child devices on a pci bus
    get_device_count_on_bridge(): recursively get # of child devices on a pci bridge
    scan_pci(): build and cache pci hierarchy
    pci_find_root_port(): find root port of a pci device
    clean_pci_cache(): free pci cache
    scan_pci_test(): test of scan pci hierarchy (disabled)

Tracked-On: #5915
Signed-off-by: Rong Liu <rong.l.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2021-05-19 13:54:24 +08:00
Rong Liu d3185f8a0c dm: PTM: Add a few pci utility functions
Add a few pci utility functions to help easy access of pci
    functionalities.
    1. pci_find_capability(): find position of specified pci capability register
    2. pci_find_ext_cap(): find extend capability register position from cap_id
    3. pci_pcie_type(): find pci-e device type
    4. is_root_port(): check whether pdev is a pci root port
    5. is_bridge(): check whether pdev is a bridge

Tracked-On: #5915
Signed-off-by: Rong Liu <rong.l.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2021-05-19 13:54:24 +08:00
Tao Yuhong 63dd23bc9e DM: TPM: Do not set VTPM and passthough TPM simultaneously
The TPM information in ACPI table is for both VPTM and passthough TPM,
so only one TPM device is allowed.

Tracked-On: #5913
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-05-18 15:49:30 +08:00
Tao Yuhong cb8a6a7514 DM: tpm: remove fixed value TPM_CRB_MMIO_ADDR
The GPA of TPM device has fixed value TPM_CRB_MMIO_ADDR, remove
TPM_CRB_MMIO_ADDR and allocate GPA base for TPM device

Tracked-On: #5913
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-05-18 15:49:30 +08:00
Tao Yuhong f1c2eca1dc DM: support mmio dev gpa resource allocation
The ACPI MMIO devices, like TPM, has a fixed base GPA. Sould support
GPA resource allocating for MMIO devices. GPA region
0xF0000000~0xFE000000 is not used, can allocate GPA from it.

Tracked-On: #5913
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-05-18 15:49:30 +08:00
Tao Yuhong 606704eff6 DM: Fix deinit_mmio_devs() conflicting type
There is "void deinit_mmio_devs()" in ./devicemodel/hw/mmio/core.c,
but "int deinit_mmio_devs()" in ./devicemodel/include/mmio_dev.h

Tracked-On: #5913
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-05-18 15:49:30 +08:00
Yonghua Huang 9c79e2ebdc dm: clean legacy software SRAM names
Remove below legacy SSRAM names:

  psram -> ssram
  ptct -> rtct

Tracked-On: #6015
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2021-05-16 10:08:48 +08:00
Tao Yuhong 8ed1d8aa5e DM: change high RAM start address to 4GB for post-launched VM
ACRN didn't support dynamic memory allocation. SO it would reserve
a big page pool and use the GPA as index to get a page to do EPT
mapping. In order to save memory, we put high MMIO windows to [4G, 5G].
AFter we support dynamic page allocation for EPT mapping, we move
high MMIO windows to where it used to ([256G, 512G]) for 39 bits physical
address), we could move high memory to where is used to too ([4G, 4G +
size]).

Tracked-On: #5913
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
2021-05-07 14:16:37 +08:00
Tao Yuhong 5ceae97ab4 DM: change 64-bit mmio address space to 256G-512G for post-launched VM
DM maps 64-bit mmio BARs of vdev into 4G-5G, for post-launched VMs. At native
platform, 64-bit MMIO BARs which have 39-bit address, are always mapped into
256G-512G address space.
Change PCI_EMUL_MEMBASE64 to 256G, change PCI_EMUL_MEMLIMIT64 to 512G. So that
the 64-bit vdev BARs of post-launched VMs have same address space with native
platform.

Tracked-On: #5913
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-05-07 14:16:37 +08:00
ppsun 2a96c567b8 DM: gvt: Identical mapping for GPU DSM refine to support EHL/TGL
Windows graphic driver obtains DSM address from in-BAR mmio register
which has passthroughed. Not like the other platforms obtained from
pci configure space register which has virtualized. GPU GuC must use
WOPCM in DSM, besides, Windows OS wants to manage DSM also. These two
reason force acrn has to keep identical mapping to avoid trap mmio
BAR to do the emulation.

Tracked-On: #5880
Signed-off-by: Peng Sun <peng.p.sun@intel.com>
2021-04-07 13:50:48 +08:00
Peter Fang e4d2f9a159 dm: graceful failure in pm_vuart
- Exit main() if pm_by_vuart_init() fails
- Use SIGHUP to gracefully power off a VM if pm_monitor_loop()
  encounters a failure
- Identify a closed socket as a failure in pm_monitor_loop()

Tracked-On: #5736
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-03-01 14:21:43 +08:00
Geoffroy Van Cutsem fb78029f0a dm: fix compilation issue with gcc10
Fix compilation issue when using gcc 10.x due to the "__packed"
attribute in acpi.h. Explicitly changing that to __attribute__((packed))
fixes the compilation error.

Tracked-On: #5671
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2021-02-01 09:28:37 +08:00
Yonghua Huang 8622d1b644 dm: refine comment on 'struct acrn_vm_config'
Refine comment on usage of this structure.

Tracked-On: #5649
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2021-01-29 13:25:47 +08:00
Yonghua Huang a6420e8cfa hv: cleanup legacy terminologies in RTCM module
This patch updates below terminologies according
 to the latest TCC Spec:
  PTCT -> RTCT
  PTCM -> RTCM
  pSRAM -> Software SRAM

Tracked-On: #5649
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2021-01-28 11:29:25 +08:00
Yonghua Huang d8b754e53a dm: relocate memory slot for SW SRAM region
GPA base of SW SRAM can't be hardcoded as physical address
  of SW SRAM(HPA), as this HPA may vary on different platform.

  This patch reserves a dedicated memory slot[GPA: 2G - 8M, 2G)
  as SW SRAM region.

Tracked-On: #5649
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2021-01-28 11:29:25 +08:00
Yonghua Huang 154a446c5c dm: build vRTCT of Software SRAM for Post-launch RTVM
This patch prepares vRTCT for post-RTVM instead of
  pass-thru native RTCT:
   - Configurations are based on Service VM native RTCT.
   - Remap vLAPIC IDs in vRTCT.
   - Remap base address of SW SRAM memory regions
     from HPA to GPA.
   - HPA base of Software SRAM shall be parsed from PTCT
     instead of hardcoding.

Tracked-On: #5649
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2021-01-28 11:29:25 +08:00
Yonghua Huang 3005d074f0 dm: add function to get VM-config information
This patch add function 'vm_get_config()' to get
 configuration information for current VM from hypervisor.

Tracked-On: #5649
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2021-01-28 11:29:25 +08:00
Yonghua Huang 4ac1205b29 dm: cleanup legacy terminologies in RTCM module
Update below terminologies according to latest TCC Spec:
  PTCM -> RTCM
  PTCT -> RTCT
  PTCM binary -> CRL
  pSRAM -> Software SRAM

Tracked-On: #5649
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2021-01-28 11:29:25 +08:00
Yonghua Huang 06e9220794 dm: rename ioctl command for hv-emulated management
Use add/remove device instead of create/destroy.

Tracked-On: #5586
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2020-12-07 16:25:17 +08:00
Peter Fang 3d99082411 dm: support OVMF split images
In addition to a single OVMF image (OVMF.fd), split images
(OVMF_CODE.fd, OVMF_VARS.fd) can be used to facilitate VM management.

From the OVMF Whitepaper:

  The variable store and the firmware executable are also available in
  the build output as separate files entitled: "OVMF_VARS.fd" and
  "OVMF_CODE.fd". This enables central management and updates of the
  firmware executable, while each virtual machine can retain its own
  variable store.

An example to launch acrn-dm with the split images:

  --ovmf code=/usr/share/acrn/bios/OVMF_CODE.fd, \
  vars=/usr/share/acrn/bios/OVMF_VARS.fd

v1 -> v2:
- use memory-mapped file I/O for writeback
- use fcntl to lock OVMF image files

Tracked-On: #5487
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2020-11-11 09:53:28 +08:00
Sun Peng 73f21a41ad DM: gvt: Identical mapping for GPU DSM
Windows graphic driver obtains DSM address from in-BAR mmio register
which has passthroughed. Not like the other platforms obtained from
pci configure space register which has virtualized. So TGL has to
keep identical mapping to avoid trap mmio BAR to do the emulation.

To keep simple, this patch hardcode the TGL DSM region in vE820
table, this will cause memory waste here. In the near future, we
need refine the entire vE820 logic as it is hard to maintained
due to many reserved regions have introduced in recently.

Signed-off-by: Sun Peng <peng.p.sun@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
Tracked-On: #5461
2020-11-04 11:24:49 +08:00
Qian Wang 46afb946da DM: modify vE820 to adapt to pSRAM
dm: modify vE820 to adapt to pSRAM for post-launched RTVM

When pSRAM is enabled for post-launched RTVM, we add a segment in vE820 for
pSRAM, and therefore the lowmem RAM will be split into part1 and part2.
Also, code of post vE820 initialization is refined

Tracked-On: #5330
Signed-off-by: Qian Wang <qian1.wang@intel.com>
2020-11-02 15:56:30 +08:00