Commit Graph

5080 Commits

Author SHA1 Message Date
Geoffroy Van Cutsem a69a5608da doc: add note to the Celadon User VM tutorial
Add a note to the "Run Celadon as the User VM" tutorial to indicate a serial
port connection to the platform (or change of the default config) may be needed
if the user uses a scenario other than SDC (the default one in the doc).

Tracked-On: #4554
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2020-05-07 08:51:41 -07:00
yuhong.tao@intel.com b0ae9cfa2b HV: Config Splitlock Detection to be disable
#AC should be normally enabled for slpitlock detection, however,
community developers may want to run ACRN on buggy system.
In this case, CONFIG_ENFORCE_TURNOFF_AC can be used to turn off the
 #AC, to let the guest run without #AC.

Tracked-On: #4765
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-05-07 09:35:22 +08:00
Geoffroy Van Cutsem bf5d187539 devicemodel: remove obsolete argument from list of options
Remove the 'p' argument from the list as it is now obsolete and there is no
implementation for it in the code.

Tracked-On: #4732
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2020-05-06 13:43:35 +08:00
Geoffroy Van Cutsem 97245363b1 doc: update `acrn-dm` parameters documentation
Update the documentation listing and describing all `acrn-dm` parameters as it
has gone out of sync with the actual implementation. Some parameters are missing
and others are now obsolete.

Tracked-On: #4732
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2020-05-06 13:43:35 +08:00
Li Fei1 0c6b3e57d6 hv: ptdev: minor refine about ptirq_build_physical_msi
The virtual MSI information could be included in ptirq_remapping_info structrue,
there's no need to pass another input paramater for this puepose. So we could
remove the ptirq_msi_info input.

Tracked-On: #4550
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-05-06 11:51:11 +08:00
Li Fei1 73335b7276 hv: ptirq: rename ptirq_lookup_entry_by_sid to find_ptirq_entry
We look up PTIRQ entru only by SID. So _by_sid could removed.
And refine function name to verb-obj style.

Tracked-On: #4550
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-05-06 11:51:11 +08:00
Wei Liu da749bcf84 acrn-config: update tgl-rvp board information
Update tgl-rvp board information.

Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
2020-05-06 11:37:14 +08:00
Yin Fengwei 68269a559f gpa2hva: add INVAVLID_HPA return value check
For return value of local_gpa2hpa, either INVALID_HPA or NULL
means the EPT walking failure. Current code only take care of
NULL return and leave INVALID_HPA as correct case.

In some cases (if guest page table is filled with invalid memory
address), it could crash ACRN from guest.

Add INVALID_HPA return check as well.
Also add @pre assumptions for some gpa2hpa usages.

Tracked-On: #4730
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2020-05-06 11:29:30 +08:00
Wei Liu 0a3ca1974e acrn-config: fix log macros for board defconfig
fix macros log level for board defconfig.

Tracked-On: #4752
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-05-06 11:25:57 +08:00
Wei Liu d03d6e96e0 acrn-config: add clearlinux UOS for launch config xmls
add 6 clearlinux UOSes for launch config xmls.

Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
2020-05-06 11:25:57 +08:00
Wei Liu 1d1270766c acrn-config: enable gvtd for waag for nuc7/nuc6 board
enable gvtd for waag of nuc7/nuc6 board by default.

Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-05-06 11:25:57 +08:00
Wei Liu a94f04fb94 acrn-config: add 4 POST_STD_VM and 1 KATA_VM for industry config xmls
For nuc7/nuc6/whl-ipci5/whl-ipc-i7 board, add 4 POST_STD_VM and 1
KATA_VM in their industry config xmls, and assign PCPU0-1 to these
PRE_LAUNCHED_VM.

Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-05-06 11:25:57 +08:00
Wei Liu 624edea6af HV: assign PCPU0-1 to post vm by default
Assign PCPU0-1 to post-launched VM. The CPU affinity can be overridden
with the '--cpu_affinity' parameter of acrn-dm.

Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-05-06 11:25:57 +08:00
Wei Liu db14c2f89f acrn-config: parse KATA VM count number with vm_type 'KATA_VM'
Parse KATA VM count number from scenario config with vm_type 'KATA_VM'
and Remove MAX_KATA_VM_NUM from scenario config xmls.

Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-05-06 11:25:57 +08:00
Wei Liu 22aecf83e0 HV: modify CONFIG_HV_RAM_START for NUC7i7DNB
When boot ACRN hypervisor from grub multiboot, HV will be loaded at
CONFIG_HV_RAM_START since relocation is not supported in grub
multiboot1. The CONFIG_HV_RAM_SIZE in industry scenario will take
~330MB(0x14000000), unfortunately the efi memmap on NUC7i7DNB is
truncated at 0x6dba2000 although it is still usable from 0x6dba2000. So
from grub point of view, it could not find a continuous memory from
0x6000000 to load industry scenario. Per efi memmap, there is a big
memory area available from 0x40400000, so put CONFIG_HV_RAM_START to
0x41000000 is much safe for NUC7i7DNB.

Tracked-On: #4641
Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-05-06 11:25:57 +08:00
David B. Kinder c431199f41 doc: fix misspellings
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-05-05 09:07:45 -07:00
David B. Kinder b0c7993309 doc: remove stray UTF-8 characters
Convert UTF-8 characters (typically pasted from Word for smart quotes
and such) into equivalent ASCII characters.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-05-04 16:16:32 -07:00
Deb Taylor 1df539b76c Doc: Updated "Advanced Guides" titles for naming consistency
Updated WaaG file

Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2020-05-04 13:17:02 -04:00
David B. Kinder f9824261e6 doc: fix broken link to touch monitor
Fixes: #4503

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-05-04 09:35:30 -07:00
David B. Kinder 58f779a069 doc: update HLD for hv_cpu_virt
Update HLD with @zidechen0 material

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-05-03 17:15:16 -07:00
Conghui Chen dcb809e824 doc: update cpu-sharing doc
change IORR to BVT, update affinity related info.

Signed-off-by: Conghui Chen <conghui.chen@intel.com>
2020-05-03 17:00:03 -07:00
Victor Sun 1675dabddc doc: build from source update
As acrn-hypervisor Makefile rule changed, the doc need to be changed
accordingly.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-05-03 16:34:08 -07:00
Victor Sun 829083c46f doc: hv elements update
The hypervisor configuration is integrated into scenario XML now,
update the elements description for hv section.

Some elements in launch XML are updated also.

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-05-03 16:34:08 -07:00
Victor Sun 3f5bfe5511 doc: reference code update for cpu sharing
The VM configuration struct initialization method is slightly changed
recently, so reference code for cpu shaing need to be changed
accordingly.

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-05-03 16:34:08 -07:00
Victor Sun 515e478282 doc: remove sdc2 and update industry scenario
Remove SDC2 scenario since usages under SDC2 could be supported by
INDUSTRY scenario which would support up to 7 post-launched VMs.

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-05-03 16:34:08 -07:00
David B. Kinder 0bd30017eb doc: update windows as UOS tutorial
Fix consistent spelling of GVT-g and malformed bullet list.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-04-29 15:38:27 -07:00
fangfang.shen d6a1bd8ca2 doc:update waag gsg after enabling gvt-d and cpu-sharing.
Signed-off-by: fangfang.shen <fangfang.shen@intel.com>
2020-04-29 11:43:29 -07:00
Geoffroy Van Cutsem c8f789ee90 doc: add note about capricious UP2 EFI firmware
The UP2 EFI firmware is a bit capricious and does not consistantly keep the
boot order after adding one using `efibootmgr`. There is no magic recipe (or
known reliable sequence) and hence we add a note warning the user that this
can happen, and when it does the only solution is to try modifying some more
the list of boot entries (inc. re-ordering them).

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2020-04-29 11:37:34 -07:00
dongshen c8fb0d76ba doc: add VT-d posted interrupt documentation
Tracked-On: #4506
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-04-29 09:59:27 -07:00
Minggui Cao 691a0e2e56 HV: add a specific stack space used in CPU booting
The original stack used in CPU booting is: ld_bss_end + 4KB;
which could be out of the RAM size limit defined in link_ram file.

So add a specific stack space in link_ram file, and used in
CPU booting.

Tracked-On: #4738
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-04-29 13:56:40 +08:00
Wei Liu 5936bf431c acrn-config: refine slot assignment for launch config
When passthrough device for VM, if there is no fun0 of the slot was passed
in, PCI expansion card can not respond as a device, it must implement at
least function number 0.

Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-04-29 09:52:37 +08:00
Wei Liu c8eda07323 acrn-config: refinement for CPU affinity check
Refine CPU affinity sanity check for both scenario and launch config
xmls.

Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-04-29 09:52:37 +08:00
David B. Kinder bb8d9fe377 doc: update to splitlock hld document
Add some spelling, grammar, and presentation updates to this new HLD
doc.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-04-28 14:53:55 -07:00
yuhong.tao@intel.com 9d327bfdf8 Doc: HLD for Split-locked Access Handling
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
2020-04-28 11:18:53 -07:00
Deb Taylor d797fefb59 Doc: Grammatical edits to acrn config tool doc
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2020-04-27 15:27:55 -04:00
Shuang Zheng de36607d48 doc: add dynamic config in web app of acrn configuration tool
Add document to dynamically create scenario config and launch config,
dynamically add or delete VM settings in scenario and launch config
in web app of acrn configuration tool

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2020-04-27 07:10:20 -04:00
Tw 01802e9134 sample: add log support when launching Xenomai
Add log related stuff for more debug information.

Tracked-On: #4514
Signed-off-by: Tw <wei.tan@intel.com>
2020-04-27 10:04:00 +08:00
Tw e69690111a sample: don't restore passthrough devices on exit by default on Xenomai
Passthroughed devices won't be restored back to SOS once launch
script exits by default. However you could revert this behavior
by specifying '-r' parameter if you want.

Tracked-On: #4514
Signed-off-by: Tw <wei.tan@intel.com>
2020-04-27 10:04:00 +08:00
David B. Kinder 17445c1914 doc: update docker build with numbered steps
Use the (new) numbered instruction style in one of our tutorials to
check it out.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-04-26 15:20:56 -07:00
Li Fei1 4c733708bf hv: lapic: minor refine about init_lapic
According to SDM Vol 3, Chap 10.4.7.2 Local APIC State After It Has Been Software Disabled,
The mask bits for all the LVT entries are set when the local APIC has been software disabled.
So there's no need to mask all the LVT entries one by one.

Tracked-On: #4550
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-04-26 10:48:49 +08:00
Li Fei1 067b439e69 hv: irq: minor refine about structure idt_64_descriptor
The 'value' field in structure idt_64_descriptor is no one used. We could remove it.

Tracked-On: #4550
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-04-26 10:48:49 +08:00
Deb Taylor b514eba9d6 Doc: Modify Getting Started and Advanced Guides sections (navigation)
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2020-04-24 13:03:54 -04:00
Wei Liu 3078595da5 acrn-config: add vm type sanity check
Refinement for VM type sanity check relays on VM UUID number.

Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
2020-04-24 16:19:55 +08:00
Wei Liu 539905e1f4 acrn-config: refinement for pci_devs in scenario config xmls
remove configurable="0" for pci_devs of pre-launched VM so that the
passthru devices could be configurable on webUI.

Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
2020-04-24 16:19:55 +08:00
Wei Liu a43b42b2a0 acrn-config: parse cpu_affinity from launch config xmls
Parse cpu_affinity from launch config xmls and generate '--cpu_affinity' as
acrn-dm args.

Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
2020-04-24 16:19:55 +08:00
Wei Liu 233f2deb4b acrn-config: add cpu_affinity for launch config xmls
1.Remove cpu_sharing item from launch config xml.
2.Add cpu_affinity for launch config xmls to configurable POST VM cpu
affinity from webUI.

Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
2020-04-24 16:19:55 +08:00
Li Fei1 c8618dd2fb hv: vioapic: minor refine about madt ioapic parse
Remove ioapic_parse_madt and do MADT IOAPIC parse in parse_madt_ioapic.

Tracked-On: #4550
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-04-24 15:35:38 +08:00
Li Fei1 907a0f7c04 hv: vioapic: minor refine about vioapic_init
Most code in the if ... else is duplicated. We could put it out of the
conditional statement.

Tracked-On: #4550
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-04-24 15:35:38 +08:00
Zide Chen 2c9c681e6d acrn-dm: change command option name from "pcpu_list" to "cpu_affinity"
commit 71bdc27a0f ("acrn-dm: implement cpu_affinity command line argument")
doesn't use correct name.

Tracked-On: #4616
Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-04-24 13:18:10 +08:00
Junming Liu 1da7e4145f dm:refine graphics data stolen memory passthru for EHL platform
EHL graphics data stolen memory(DSM) info has diff with KBL/WHL,
which includes two parts:
(1) DSM register location in pci config: on KBL/WHL, the register
locates on 0X5C, while on EHL, the register locates on 0xC0.
(2) DSM address length: On KBL/WHL,
DSM addr has 32 bits, while on EHL,DSM addr has 64 bits.

Here, refine graphics data stolen memory passthru to enable GVT-d on EHL platforms.

v3 -> v4:
        * add MICRO INTEL_ELKHARTLAKE
v2 -> v3:
	* refine discription,MICRO name
	* refine code style
v1 -> v2:
	* add callback functions for scalability

Tracked-On: projectacrn#4700

Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Liu XinYun <xinyun.liu@intel.com>
Reviewed-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2020-04-24 12:54:50 +08:00