Commit Graph

5619 Commits

Author SHA1 Message Date
Victor Sun a4cca45bc6 acrn-config: minor change scenario xml for ehl
changes:
	1. Change SOS VM rootfs to nvme0;
	2. Change hybrid_rt scenario VM0 mem size to 1GB;

Tracked-On: #5238

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-10-29 13:37:03 +08:00
Peter Fang 654d0f9d00 misc: life_mngr: use the entire read buffer for the SOS socket
The messages from the SOS socket can be safely read into the entire read
buffer.

Tracked-On: #5429
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2020-10-29 10:11:25 +08:00
Peter Fang 830b7749de dm: correctly handle EAGAIN in pm_vuart when listening
pm_vuart stops listening and relays the message right away if it
encounters EAGAIN during read(). This causes the messages relayed to be
fragmented.

Only relay the message when it encounters a null character or a newline
character, or when the buffer is full.

Tracked-On: #5429
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2020-10-29 10:11:25 +08:00
Zide Chen a776ccca94 hv: don't need to save boot context
- Since de-privilege boot is removed, we no longer need to save boot
  context in boot time.
- cpu_primary_start_64 is not an entry for ACRN hypervisor any more,
  and can be removed.

Tracked-On: #5197
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2020-10-29 10:05:05 +08:00
Shuang Zheng 2309cadc9a acrn-config: passthrough embeded tsn device for pre-launched RTVM
passthrough embeded tsn device for pre-launched RTVM on hybrid-rt
scenario of tgl-rvp board.

Tracked-On: #5427

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2020-10-29 09:47:21 +08:00
Shuang Zheng 5229c576d3 acrn-config: update tgl board xml with tsn IFWI
update tgl-rvp.xml for tgl boards with IFWI of tsn version to enable
the embeded tsn device.

Tracked-On: #5427

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2020-10-29 09:47:21 +08:00
Yang, Yu-chu d743aa9b42 acrn-config: Get vbar base and index for vmsix supported devices
Add functionality to get free vbar base for the vmsix devices.

- The devices size is 4k.
- The mmio range for non SOS VM is 2G to 4G
- The mmio range for SOS is depended on the range which is assigned to
PCI bus hostbridge
- The next vbar index is based on last device vbar index vbar_i

Tracked-On: #5422
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2020-10-29 09:45:30 +08:00
David B. Kinder ec731bac0f doc: update doxygen configuration
Update some configuration settings that will be obsolete in the new
(1.8.17) doxygen release.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-10-26 09:20:50 -07:00
Shiqing Gao c51a96a11b doc: update coding guidelines
- add a rule for "U" suffix
 - release the restrictions about function documentation

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2020-10-26 09:20:18 -07:00
Yonghua Huang 30bbfa0d26 dm: confiure msix bar for hv-land ivshmem devices
This patch configures MSIX entry table bar for hv-land ivhsmem devices.

Tracked-On: #5407
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Li, Fei <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-10-26 08:44:13 +08:00
Yonghua Huang 9b4ba19753 hv: enable doorbell for hv-land ivshmem device
This patch enables doorbell feature for hv-land
ivshmem device to support interrupt notification
between VMs that use inter-VM(ivshmem) devices.

Tracked-On: #5407
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Li, Fei <fei1.li@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-10-26 08:44:13 +08:00
Yonghua Huang 62a36ce34b doc: update 'hv-virt-interrupt.rst'
Update this file as 'vlapic_intr_msi()' is renamed.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2020-10-26 08:44:13 +08:00
Yonghua Huang 3ea1ae1e11 hv: refine msi interrupt injection functions
1. refine the prototype of 'inject_msi_lapic_pt()'
 2. rename below function:
    - rename 'vlapic_intr_msi()' to 'vlapic_inject_msi()'
    - rename 'inject_msi_lapic_pt()' to
      'inject_msi_for_lapic_pt()'
    - rename 'inject_msi_lapic_virt()' to
      'inject_msi_for_non_lapic_pt()'

Tracked-On: #5407
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Li Fei <fei1.li@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-10-26 08:44:13 +08:00
Yonghua Huang 012927d0bd hv: move function 'inject_msi_lapic_pt()' to vlapic.c
This function can be used by other modules instead of hypercall
 handling only, hence move it to vlapic.c

Tracked-On: #5407
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Li, Fei <fei1.li@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-10-26 08:44:13 +08:00
Yonghua Huang f511a71c4e hv: add vmsix capability for hv-land ivshmem device
This patch exposes vmsix capability for ivshmem
  device:
  - Initialize vmsix capability in ivshmem PCI
    config space.
  - Expose BAR1 as vmsix entry table bar.

Tracked-On: #5407
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Li, Fei <fei1.li@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-10-26 08:44:13 +08:00
Yonghua Huang 8137e49e17 hv: add functions to initialize vmsix capability
- add 'vpci_add_capability()' to initialize one
   PCI capability in config space.
 - add 'add_vmsix_capability()' to add vmsix capability.

Tracked-On: #5407
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Li, Fei <fei1.li@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-10-26 08:44:13 +08:00
Yonghua Huang cdfc82f03b hv: refine pass-thru device specific vmsix function
- write_vmsix_cap_reg(): emulates vmsix cap writes.
   write_pt_vmsix_cap_reg(): emulates msix cap write
   for PT devices.

 - rw_vmsix_table(): emulates vmsix table bar space access.

 - vmsix_handle_table_mmio_access(): emulates the vmsix
   bar space access only.

 - pt_vmsix_handle_table_mmio_access(): emulates the vmsix
   bar space access and remap msi entry for PT device if
   write operation is executed.

 - rename 'init_vmsix()' and 'deinit_vmsix()' to
   'init_vmsix_pt()' and 'deinit_vmsix_pt()' respectively,
   they're for PT devices only.

  - remove below 2 functions,call
        'pci_vdev_read_vcfg()' directly in cases they're used.
        - 'read_vmsi_cap_reg()'
        - 'read_vmsix_cap_reg()'

Tracked-On: #5407
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Li, Fei <fei1.li@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Acked-by: Eddie Done <eddie.dong@intel.com>
2020-10-26 08:44:13 +08:00
Yonghua Huang 1a252b5f18 hv: move vmsix functions to pci_pt.c
vmsix.c originally covers ptdev case but ACRN hypervisor
  need to support pure virtual PCI mediator, such as ivshmem
  device in this patch set.

  For better understanding the code changes from patch
  perspective, split the changes to several small patches.

  This patch moves most original vmsix code to pci_pt.c
  as they're mixed with ptdev specific operations.

  The subsequent patches will start the detail abstraction change.

Tracked-On: #5407
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Li Fei <fei1.li@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-10-26 08:44:13 +08:00
Yonghua Huang 4ade4473ae hv: bugfix in function 'write_vmsix_cap_reg()'
- Fix bug when setting input 'offset' before calling
   'pci_vdev_read_cfg()' and 'pci_pdev_write_cfg()'

Tracked-On: #5407
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Li, Fei <fei1.li@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-10-26 08:44:13 +08:00
Li Fei1 53165c3332 dm: fix typo error to pass through TPM device
Fix typo error "--apicdev_pt HID" to pass through a TPM device. Fix it to
"--acpidev_pt HID"

Tracked-On: #5401
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-10-21 16:40:33 +08:00
Zide Chen 802065cf2f acrn-config: remove UEFI_OS_LOADER_NAME from all configurations
Tracked-On: #5197
Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-10-21 15:09:26 +08:00
Zide Chen 75c9dbb46d acrn-config: remove CONFIG_UEFI_OS_LOADER_NAME from python scripts
Since UEFI boot is no longer supported.

Tracked-On: #5197
Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-10-21 15:09:26 +08:00
Zide Chen 9f2b35507a hv: remove UEFI_OS_LOADER_NAME from Kconfig
Since UEFI boot is no longer supported.

Tracked-On: #5197
Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-10-21 15:09:26 +08:00
Zide Chen 6a0a3233c3 hv: remove unused de-privilege and vboot wrapper code
Remove deprivilege_boot.c, direct_boot.c, vboot_wrapper.c and their
header fioles.

Tracked-On: #5197
Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-10-21 15:09:26 +08:00
Zide Chen bebffb29fc hv: remove de-privilege boot mode support and remove vboot wrappers
Now ACRN supports direct boot mode, which could be SBL/ABL, or GRUB boot.
Thus the vboot wrapper layer can be removed and the direct boot functions
don't need to be wrapped in direct_boot.c:

- remove call to init_vboot(), and call e820_alloc_memory() directly at the
  time when the trampoline buffer is actually needed.
- Similarly, call CPU_IRQ_ENABLE() instead of the wrapper init_vboot_irq().
- remove get_ap_trampoline_buf(), since the existing function
  get_trampoline_start16_paddr() returns the exact same value.
- merge init_general_vm_boot_info() into init_vm_boot_info().
- remove vm_sw_loader pointer, and call direct_boot_sw_loader() directly.
- move get_rsdp_ptr() from vboot_wrapper.c to multiboot.c, and remove the
  wrapper over two boot modes.

Tracked-On: #5197
Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-10-21 15:09:26 +08:00
Zide Chen 61699263f3 Makefile: remove FIRMWARE variable from Makefile
Since now we support direct boot only, we don't have to use FIRMWARE variable
to differentiate between sbl/GRUB and UEFI boot.

After this change:
- "FIRMWARE=sbl/uefi" should be removed from make commands.
- the firmware name is removed from the installed ACRN image. For example,
  acrn.apl-up2.sbl.sdc.32.out will be changed to acrn.apl-up2.sdc.32.out.

Tracked-On: #5197
Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-10-21 15:09:26 +08:00
Zide Chen 472534e922 efi-stub: remove efi-stub
UEFI boot is no longer supported in ACRN.

Tracked-On: #5197
Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-10-21 15:09:26 +08:00
Liu Long d85d66141c dm: fix fault Injection into VirtIO console backend
Add Null pointer check in init vq ring and add vq ring descriptor
check in case cause Nullpointer exception.

Tracked-On: #5355
Signed-off-by: Liu Long <long.liu@intel.com>
2020-10-19 11:08:32 +08:00
Shuang Zheng abcfc1c0a0 acrn-config: update vm configurations for hybrid_rt
update vm configurations for hybrid_rt scenario on WHL/EHL/TGL/CFL
boards, add 1 YaaG and assign 1 more pcpu for WaaG.

Tracked-On: #5390

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-10-14 14:00:45 +08:00
Shuang Zheng 13d39fda85 hv: update hybrid_rt with 2 post-launched VMs in Kconfig
update the help message of config SCENARIO to set 2 standard
post-launched VMs for default hybrid_rt scenario in Kconfig.

Tracked-On: #5390

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-10-14 14:00:45 +08:00
Shuang Zheng 3a764101a8 acrn-config: assign 2 CPUs for WaaG and add 1 YaaG on hybrid_rt
assign 2 CPUs for WaaG and add 1 YaaG on hybrid_rt scenario for
WHL/EHL/TGL/CFL boards.

Tracked-On: #5390

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-10-14 14:00:45 +08:00
dongshen 29cbce07f6 acrn-config: fix hang issue for board EHL (hybrid_rt)
P2SB_BAR_ADDR related macros should only be defined in misc_cfg.h only when
p2sb is enabled in scenario xml.

Tracked-On: #5340
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-10-14 13:56:44 +08:00
Shuang Zheng b64d23407b acrn-config: increase hv ram size for 7 VMs
increase hv ram size for 7 VMs to avoid ram overflowed.

Tracked-On: #5389

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-10-14 11:36:24 +08:00
Victor Sun 86e37fbe01 HV: add config code for cfl-k700-i7 board
Add configurations code of industry scenario and hybrid_rt scenario for
cfl-k700-i7 board to support build acrn binary from source code directly.

Tracked-On: #5212

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-10-14 11:25:09 +08:00
Victor Sun 1a29d5c371 acrn-config: add cfl-k700-i7 hybrid_rt xmls
Add cfl-k700-i7 hybrid_rt xml to support ACRN hybrid_rt scenario on
cfl-k700-i7 board.

Tracked-On: #5212

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-10-14 11:25:09 +08:00
Shixiong Zhang 0c75ee956c acrn-config: Add Px / Cx state info for tgl-rvp
the CX_INFO and PX_INFO in tgl board xml is empty,
added it.

Tracked-On: #5338

Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
2020-10-13 10:42:24 +08:00
Shixiong Zhang f258074c6c acrn-config: Provide post launch xml for hybrid scenario
There is no default xml for hybrid_rt to to generate the
script of posted launch WaaG.

Tracked-On: #5336

Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
2020-10-13 09:28:05 +08:00
Shixiong Zhang 4d65064fd6 acrn-config: modify the get_scenario_uuid function to use the right vmid
Fail to launch waag by the script generated by launch config on
hybrid_rt scenario, the get_scenario_uuid function should use the
vmid instad of the uosid to get the correct uuid.

Tracked-On: #5336

Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
2020-10-13 09:28:05 +08:00
David B. Kinder 5289a3eb97 doc: more spelling and grammar fixes
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-10-03 09:11:19 -07:00
David B. Kinder 576a3b5947 doc: spelling and grammar improvements
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-10-01 18:08:00 -07:00
David B. Kinder f300d1ff77 doc: update breadcrumb to include release version
As a DX improvement in the documentation, include the release version
(or Latest) in the breadcrumb header on every page.  This can help
readers know which release version documentation they're using.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-10-01 14:53:29 -07:00
David B. Kinder 87bab944e6 doc: tweak 2.2 release notes
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-10-01 12:31:12 -07:00
wenlingz ead321637d version:2.3
Signed-off-by: wenlingz <wenling.zhang@intel.com>
2020-10-01 07:51:39 +08:00
David B. Kinder fb45ad517e doc: redirect to 2.1 version for delete docs
As we're removing Clear Linux docs because of removing depriviliged boot
mode support, we can refer folks to the last known version of these docs
in the v2.1 release instead of just throwing a 404 error.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-09-30 14:41:16 -07:00
David B. Kinder 2ef34b21b3 doc: tweak 2.2 release notes
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-09-29 21:48:19 -07:00
fuzhongl b69e650435 Doc: release_notes_2.2 update
Signed-off-by: fuzhongl <fuzhong.liu@intel.com>
2020-09-29 21:34:33 -07:00
David B. Kinder 22abc0ec9e doc: add v2.2 to doc menu choices
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-09-29 18:31:58 -07:00
David B. Kinder f9ddbdb49d doc: update rt_industry GSG and v2.2 release notes
Update release notes and fix merge conflict in PR #5365

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-09-29 17:51:07 -07:00
Shixiong Zhang f094ae8e31 doc: add the iasl dependence
From V2.2, we use the iasl tool to compile offline
ACPI binary for pre-launched VMs while building ACRN,
so we need to install the iasl tool in the ACRN
building environment. This doc is to describe how
to install the iasl tool and specify the version of
iasl at the chapter Install build tools and dependencies.

Tracked-On: #5350

Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
2020-09-29 14:47:56 -07:00
Shixiong Zhang 40b3d719d9 doc: add the iasl dependence
add the the necessary tools

Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
2020-09-29 14:47:56 -07:00