Commit Graph

23 Commits

Author SHA1 Message Date
Huihuang Shi 8dfb9bd9c0 hv: dm: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.
V1->V2:
    make the return value match to int32_t

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-29 15:03:48 +08:00
Shiqing Gao b430b00a08 hv: fix 'Expression is not Boolean'
MISRA-C requires that the controlling expression of an if statement or
an iteration-statement shall be Boolean type.

v1 -> v2:
* update the U suffix of constant to let the type of operands
  to bit operations (&) is the same.
* update the type of 'i' from uint64_t to uint16_t in
  'profiling_set_control' since it is limited by phys_cpu_num,
  which is uint16_t.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-08 13:04:11 +08:00
Binbin Wu 039a1c0f2e hv: pci: replace fucntion like macro with inline func
Replace fucntion like macro with inline function.

Tracked-on: #1747
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-08 09:12:30 +08:00
Shiqing Gao 366042cac2 hv: fix integer violations
- Fix the integer violations related to the following rules:
  1. The operands to shift operations (<<, >>) shall be unsigned
     integers.
  2. The operands to bit operations (&, |, ~) shall be unsigned
     integers.

- Replace 12U with CPU_PAGE_SHIFT when it is address shift case.

v1 -> v2:
 * use existed MACRO to get bus/slot/func values
 * update PCI_SLOT MACRO to make it more straightforward
 * remove the incorrect replacement of 12U with CPU_PAGE_SHIFT
   dmar_fault_msi_write

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-06 16:18:56 +08:00
Xiangyang Wu 99586e32cc HV:treewide:rename vm data structure
For data structure types "struct vm", its name is identical
with variable name in the same scope. This is a MISRA C  violation.

Naming convention rule:If the data structure type is used by multi
modules, its corresponding logic resource is exposed to external
components (such as SOS, UOS), and its name meaning is simplistic
(such as vcpu, vm), its name needs prefix "acrn_".

The following udpates are made:
struct vm *vm-->struct acrn_vm *vm

Tracked-On: #861

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-11-05 15:35:49 +08:00
Zide Chen 0255e62798 hv: resolve the negative impacts to UOS MSI/MSI-X remapping
After enabling vPCI in hypervisor for vm0, UOS may not able be launched
successfully. Consider this scenario (take MSI-X for example):

- DM makes hypercall to hypervisor to do MSI-X remapping on behalf of
  UOS guests.
- After the hypercall, VHM module in SOS kernel updates the physical
  MSI-X table with the physical Message Data/Addr.
- These MMIO write requests are intercepted by hypervisor, which will
  call ptdev_msix_remap() to do MSI-S remapping.

It may fail due to 2 possible reasons:

1) wrong target VM because:
  hypervisor thinks it's a VM0 MSI-X device but they have been registered
  as UOS guests through HC_SET_PTDEV_INTR_INFO hypercall.

2) wrong ptdev_msi_info->vmsi_data because:
  The virtual MSI-X table is supposed to hold virtual Message data/addr
  but the SOS VHM writes the physical ones to it.

This patch resolves these problems by ignoring the HC_VM_PCI_MSIX_REMAP
hypercall, so virtual and physical Message Data are the same from SOS'
perspective and it won't mess up the virtual PCI device in HV.

Also in HC_SET_PTDEV_INTR_INFO handler, vpci updates the target VM
when the PCI devices are assigned to different VMs.

The UOS' MSI/MSI-X remapping is triggered by hypervisor when SOS (either
DM or VHM) updates the Message Data/Addr.

Tracked-On: #1568
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-01 21:22:10 +08:00
Zide Chen 8c398f7d7e hv: fix issues when msi-x shares same BAR with other data structures
If PBA or other data structures reside in the same BAR with MSI-X,
devicemodel could emulate them and make hypercall SET_MEMORY_REGION
to setup EPT for vm0.

Hypervisor can not intercept the whole range of this BAR, but only
the minimum 4KB pages that cover the MSI-X Table.

Tracked-On: #1568
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-01 21:22:10 +08:00
Zide Chen dbe156e9f6 hv: fix misrac violations in vcpi code
Fixed the following violations:
- Widening cast on complex integer expression
- Casting operation to a pointer
- Static procedure is not explicitly called in code analysed

Tracked-On: #1568
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-01 21:22:10 +08:00
Zide Chen 83dbfe4fd3 hv: implement sharing_mode.c for PCI emulation in sharing mode
Compared with partition_mode.c, the major difference between them is
the list of PCI devices is statically defined or dynamically
enumerated and allocated.

Tracked-On: #1568
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-29 14:29:37 +08:00
Zide Chen 7c506ebc69 hv: implement msix.c for MSI-X remapping
Similar to MSI emulation, this patch emulates the Message Control word
within MSI-X Capability Structure.

Also it emulates MSI-X table. MSI-X remapping is triggered when the guest
is changing the Mask bit in Vector Control, or the Message Data/Addr when
MSI-X Enable bit is set.

Tracked-On: #1568
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-29 14:29:37 +08:00
Zide Chen dcebdb8e98 hv: implement msi.c to handle MSI remapping for vm0
Emulate MSI Capability structure for vm0 in sharing mode:

- it intercepts the IO requests for MSI Capability structure, emulates
  the Message Control word, and bypasses all other I/O requests to the
  physical device.

- criteria to trigger MSI remapping: MSI Enable bit is being changed,
  Message Data/Addr is being changed when MSI Enable is set.

Tracked-On: #1568
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-29 14:29:37 +08:00
Zide Chen 6af47f249c hv: vpci: add callback functions to struct vpci
Add 'struct vpci_ops *ops' to 'struct vpci' so we have clearer structure:

- struct vpci: include struct vpci_ops pointing to different callback
  functions for partition or sharing mode repsectively.
- struct pci_vdev: includes struct pci_vdev_ops to handle different vpci
  functionalities:
      hostbridge emulation
      passthrough device BAR emulation
      msi/msi-x remapping

This patch moves the code around but doesn't change the underlying logic
in terms of PCI spec handling. More detailed implementation:

- create new file partition_mode.c to house the implementation of partition mode
  regarding the vpci layer.
- vpci.c: only keeps the abstract code which calls vpci->ops to functions
  in partition_mode.c, and potentially to sharing_mode.c.
- the following functions are moved to partition_mode.c and renamed with
  partition_mode prefix.
    - vpci_init() -> partition_mode_vpci_init()
    - vpci_cleanup() -> partition_mode_vpci_deinit()
    - pci_cfg_io_write() -> partition_mode_cfgread()
    - pci_cfg_io_read() -> partition_mode_cfgwrite()

Track-On: #1568
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
2018-10-29 14:29:37 +08:00
Zide Chen ec5b90f11e hv: implement PCI bus scan function
- It starts from scaning bus 0 and scan other buses only if it is referred
  as a Secondary Bus by a PCI-to-PCI bridge.
- Skip to next device if function 0 is not implemented.
- Don't enumerate function 1-7 if a device is not a multi-function device.

Tracked-On: #1568
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-29 14:29:37 +08:00
Zide Chen 9cc1f57f63 hv: change function parameters: pci_pdev_read_cfg and pci_pdev_write_cfg
In order to allow these functions to be called without an associated
struct pci_pdev (for example, at the time of PCI bus enumeration), these
two functions can not take the struct vdev as input parameter.

Tracked-On: #1568
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-29 14:29:37 +08:00
Zide Chen 7b4b78c323 hv: minor cleanup for dm/vpci code
- It makes more sense to return bool from pci_bar_access()
- other minor changes for cleanup

Tracked-On: #1568
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-29 14:29:37 +08:00
Zide Chen bc4f82d1d1 hv: more cleanup for pci.h
Don't have any logical changes.
- add more common PCI macros
- remove redundant definitions in dmar_parse.c
- move all the common mascos from vpci.h to pci.h

Tracked-On: #1568
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-29 14:29:37 +08:00
Zide Chen a6677e6e69 hv: create new file core.c and pci.c
- move the functions to access physical PCI configuration space from
  pci_pt.c to the new file dm/hw/pci.c, so they can be accessed in
  sharing mode as well. The new folder dm/hw is created in order to
  move APIs talking to physical PCI devices out of dm/vpci.
- move the common vpci code from header file pci_priv.h to core.c.
- move file include/dm/vpci/vpci.h one level up. It seems the folder
  include/dm/vpci is not necessary.
- This patch only moves code around, and doesn't make any logical
  changes. Besides removes the static keyword from pci_pdev_read_cfg()
  and pci_pdev_write_cfg()

Tracked-On: #1568
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-24 18:11:02 +08:00
Zide Chen 4741fcfff2 hv: pci_priv.h code cleanup
- move most of the content of pci_priv.h to include/dm/pci.h.
  This allows other code outside dm/vpci to be able to share these macros.
- code cleanup: fix alignments etc.

Tracked-On: #1568
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-24 18:11:02 +08:00
dongshen c9ea8901e6 HV: VPCI coding style fix
- Converted MACROS to functions
- Defined pci_bar_type enum
- Defined pci_bdf as union instead of uint16_t to eliminate macros
- Use L or UL postfix after unsigned integers

Tracked-On: #1126
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2018-09-03 11:26:30 +08:00
dongshen 183ca5d175 HV: Adding hostbridge vdev device support for partition hypervisor
V4:
 - Moved error checking to vdev_hostbridge_cfgwrite/vdev_hostbridge_cfgread

V3:
 - Unified ops calling and implemented deinit/cfgwrite/cfgread ops,
      previously only init op is implemented

Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2018-08-10 10:09:00 +08:00
dongshen 181de19cba HV: Adding passthru vdev device support for partition hypervisor
V4:
 - Renamed members for struct pcibar and changed code accordingly

V3:
 - Do not use ASSERT
 - Use EPT_XX defines when claling ept_mr_add
 - Report 64-bit MMIO physical bar to UOS as 32-bit virtual bar
   (assume bar size is always less than 4GB), which removed quite some of
   64-bit bar handling code

Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2018-08-10 10:09:00 +08:00
dongshen 86180bd4ce HV: Calling into VPCI init/unit functions for partition hypervisor
V4:
 - Clear address cache info after a full cf8/cfc access
 - Add NULL pointer checking when calling init/deinit ops

V3:
 - Do not use ASSERT
 - Loop through the vdev list defined in vm_desctiption table to call the vdev init/unit functions
 - Make the cached vbdf info struct per vm instead of per pcpu

V2:
 - Fixed MISRA violations

Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2018-08-10 10:09:00 +08:00
dongshen f60fcb6b16 HV: Defining the per-vm static vpci table for partition hypervisor
V4:
- Renamed members for struct pcibar
- License header fix
- Added vpci_vdev_array to struct vm_description

V3:
 - Defined the static centralized vpci table to reduce code size,
   previously many of the settings are obtained/generated dynamically

Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2018-08-10 10:09:00 +08:00