Commit Graph

3240 Commits

Author SHA1 Message Date
Geoffroy Van Cutsem d4ce780ec0 doc: update the instructions to increase the size of a UOS disk image
Update the instructions on how to increase the size of a UOS disk image so that
the entire operation can be performed on the development host. This has the
advantage that it can be done completely offline (the UOS must be powered off
in fact) and no extra tools need to be installed in the UOS to do this.

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2019-03-22 10:18:34 -04:00
Shiqing Gao 80dc2c85a5 doc: add some rules related to language extensions
This patch adds some rules related to language extensions.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2019-03-22 10:15:07 -04:00
Xiangyang Wu 3026a372a1 DOC:Update standard reference of SW design guidelines
For open source, just need to refer FuSa standard instead
of listing concrete fulfillment matrix.

Add related FuSa standard reference and remove related
fulfillment matrix.

V1-->V2:
       Make reference more clear according to David'comments

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2019-03-22 10:14:42 -04:00
Lei Lu fddc5b9154 doc: update UP2 sample directory name in create-up2-image.sh
Signed-off-by: Lei Lu <leix.lu@intel.com>
2019-03-22 10:14:07 -04:00
Geoffroy Van Cutsem 904c9e291e doc: add more details to the FAQ (for version 0.7)
Add more details and clarifications to the new FAQ being added for v0.7

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2019-03-22 10:01:34 -04:00
wenlingz c47efa3f5a Add new FAQ
Signed-off-by: wenlingz <wenling.zhang@intel.com>
2019-03-22 10:01:34 -04:00
Binbin Wu 98b3d98ac5 hv: vmsr: add IA32_MISC_ENABLE to msr store area
Currently MSR IA32_MISC_ENABLE is passthrough to guest.
However, guest may change the value of this MSR, which will cause issue in hypervisor.
This patch uses VMX MSR store area to isolate the MSR IA32_MISC_ENABLE between guest and host.

TODO:
Some bits of the MSR IA32_MISC_ENABLE is not just per core, but per package.
So need to check if need to prevent guest from setting or clearing these bits that may affect other cores.

Tracked-On: #2834
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-03-22 13:32:01 +08:00
Binbin Wu 273381b372 hv: vmsr: rename msr_num to msr_index in struct msr_store_entry
Rename the field msr_num to msr_index, which is more accurate,
in struct msr_store_entry.

Tracked-On: #2834
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-03-22 13:32:01 +08:00
Mingqiang Chi 5585084c00 hv:move 'udelay' to timer.c
-- move this api from misc.c to timer.c to avoid
   reverse dependency, and remove misc.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-03-22 08:38:13 +08:00
Zide Chen 370998ba5a hv: replace MEM_2K with a new macro MAX_BOOTARGS_SIZE for bootargs size
- for all cases of referring guest bootargs size, replace MEM_2K with
  CONFIG_MAX_BOOTARGS_SIZE for better readability.
- remove duplicated MAX_BOOTARGS_SIZE definition from vm_config.h.

Also fix one minor issue in general_sw_loader() which uses copy_to_gpa()
to copy a string. Since copy_to_gpa() makes use of memncpy_s() to do the
job, the size parameter should include the string null ternimator.

Tracked-On: #2806
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-21 13:08:15 +08:00
Yuan Liu 12d977284a DM: virtio-gpio: export GPIO ACPI device
Add dsdt for virtio-gpio device.

Tracked-On: #2512
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-03-20 20:12:33 -07:00
Yuan Liu 014e611b14 DM: virtio-gpio: add IRQ statistics
print each IRQ descriptor interrupts number and all of IRQ descriptors
interrupts when UOS requests or releases a GPIO IRQ.

Tracked-On: #2512
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-03-20 20:12:33 -07:00
Yuan Liu 83a98acb1b DM: virtio-gpio: support reading value from IRQ descriptor
Support reading GPIO value when the GPIO switches to IRQ mode.

Tracked-On: #2512
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-03-20 20:12:33 -07:00
Yuan Liu d34b3ebdd0 DM: virtio-gpio: emulate GPIO IRQ controller
GPIO IRQ controller emulation is used to handle level trigger and
edge trigger interrupts. Use GPIO IRQ virtqueue to handle IRQ chip
operations and GPIO event virtqueue to indicate IRQ source to UOS.

Tracked-On: #2512
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-03-20 20:12:33 -07:00
Yuan Liu 92a0a399b7 DM: virtio-gpio: GPIO IRQ initialization.
add the GPIO IRQ definitions, and implement the GPIO IRQ
initialization and deinitialization.

Tracked-On: #2512
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-03-20 20:12:33 -07:00
Yuan Liu 9480af8d32 DM: virtio-gpio: setup two virqueues for gpio irq
There are two virtqueues for irq, one for handling the operations of
front-end irq controller and the other for triggering the interrupt.

Tracked-On: #2512
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-03-20 20:12:33 -07:00
Qi Yadong e381aef220 hv: seed: remove unused seed parsing source files
Remove the unused seed parsing source files under
hypervisor/boot/sbl and related header files.

Tracked-On: #2724
Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2019-03-21 11:06:53 +08:00
Arindam Roy 0947fbab94 HV: Fix a compiler warning in firmware.h
Added a struct acrn_vm in firmware.h to remove
a compiler warning.
No change in logic.

Tracked-On: #2830
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2019-03-21 10:28:44 +08:00
Peter Fang 071ce15ed4 dm: build E820 map for OVMF
OVMF requires a more descriptive mechanism than RTC CMOS to retrieve
ACRN's memory layout, so we now pass the E820 map to it, starting at
0xEF000 (ROM area).

ACRN currently uses [4GB, 5GB) as its 64-bit PCI host aperture. This is
inconsistent with OVMF's assumption of its platform's memory layout,
because it derives the size of high memory from RTC CMOS, which is
incapable of describing the 64-bit PCI hole.

By default, OVMF uses RTC CMOS 0x5b/0x5c/0x5d to determine the size of
high memory. This value only tells OVMF how much memory is above 4GB,
but not the platform's memory layout above 4GB.

Using RTC CMOS works for QEMU, because QEMU places its 64-bit PCI host
aperture above its highmem. Therefore, OVMF can always assume highmem is
located at [4GB, 4GB + highmem), which is not where ACRN's highmem is
located. For example, if we have 1GB of usable memory above 4GB, ACRN
will place it at [5GB, 6GB).

This change allows OVMF to correctly identify the guest's memory layout.
It will consider any reserved region above 4GB as 64-bit PCI host
aperture.

MP table, SMBIOS and ACPI tables are all located above 0xF0000 so it is
guaranteed that there is no overlap. There can only be a maximum of 128
E820 entries.

v1 -> v2:
- provide more explanation to this commit
- add signature before E820 map for OVMF backward compatibility

Tracked-On: #2792
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
2019-03-21 10:28:17 +08:00
Peter Fang 4dd1331072 dm: remove empty UOS E820 entries
While building the E820 map for UOS, [lowmem, lowmem_limit) and [5GB,
highmem) can be empty. Remove the empty entries if they appear.

Tracked-On: #2792
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
2019-03-21 10:28:17 +08:00
Peter Fang 643513f3d4 dm: update UOS default E820 map
- fix comments
- update the first RAM region to [0, 0xA0000) because [0xA0000, 1MB) is
  designated as video memory and ROM area
- use 2GB as lowmem_limit

Tracked-On: #2792
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
2019-03-21 10:28:17 +08:00
Peter Fang 263b486a09 dm: pci: add MMIO fallback handler for 64-bit PCI hole
Add the PCI MMIO fallback handler to the 64-bit PCI host aperture, so
that the guest won't inadvertently crash acrn-dm due to unhandled MMIO.

Tracked-On: #2792
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
2019-03-21 10:28:17 +08:00
Peter Fang 82e42cfa2a dm: clean up mem.c
- use strncmp() instead of comparing string pointers to make no
  assumptions about the toolchain's literal pool
- re-shuffle the functions so they're consistent with mem.h
- make non-public functions static
- increase code re-use

Tracked-On: #2792
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
2019-03-21 10:28:17 +08:00
Peter Fang 890d40226b dm: remove GUEST_CFG_OFFSET
Per commit dbd9ab07e1, GUEST_CFG_OFFSET is
no longer needed.

Tracked-On: #2792
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
2019-03-21 10:28:17 +08:00
Kaige Fu f97ba34024 Doc: Add tutorial about using zephyr as uos
This patch add tutorial about using zephyr as guest.

Tracked-On: #2713
Signed-off-by: Kaige Fu <kaige.fu@intel.com>

---
v3 -> v4:
  - Addressed two minor comments from David

v2 -> v3:
  - Detail section `Build Zephyr`
  - Add missing sudo
  - Automatically boot zephyr
  - Other grammar, phrasing fix

v1 -> v2:
  - NUC7i5DNH -> NUC7i5DNHE.
  - Add note about doc to build acrn supported zephyr image.
  - Refine section `Boot Zephyr as User OS`.
  - Some minor fix.
2019-03-20 11:05:14 -04:00
Geoffroy Van Cutsem 410c76ac18 hv: enhance ACRN shell interactive help
Enhance the ACRN shell interactive help. It is close to a 1-1 mapping with
the online documentation but cut a little shorter in various places to make it
more user-friendly when using it from the ACRN console.

Tracked-On: #2829
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2019-03-20 22:05:06 +08:00
Zide Chen a0de49d03e hv: fix potential buffer overflow in sbl_init_vm_boot_info()
To merge the multiboot bootargs within sbl_init_vm_boot_info(), buffer
overflow could happen when it doesn't provide correct 'dmax' argument
to strncpy_s().

Also, currently it doesn't check the availability of the dest buffer before
overwriting '\0' with a whitespace, which theoretically the dest string
could end up with no null terminator within it's array boundary.

This patch also creates a separate function to merge the cmdline strings,
because after the above fixes some lines in sbl_init_vm_boot_info()
function could have up to 7 tabs in front of the first character, which
looks messy and sbl_init_vm_boot_info() is getting too complicated.

Tracked-On: #2806
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-03-20 15:12:21 +08:00
Yan, Like 93ed2af165 hv: passthru TSC_ADJUST to VM with lapic pt
Linux access TSC_ADJUST to verify it has not tampered every time when enter idle.
So for RTVM running rt-linux, the access will cause vm exit which affect real-time performance.

This commit pass through TSC_ADJUST to VM with lapic_pt, to avoid TSC_ADJUST caused vm_exit.
For other VMs, TSC_ADJUST msr access is still trapped and emulated.

Tracked-On: #2813
Signed-off-by: Yan, Like <like.yan@intel.com>
2019-03-20 13:35:28 +08:00
Binbin Wu f32b59d73d hv: disable mpx capability for guest
This patch hide Memory Protection Extention (MPX) capability from guest.

- vCPUID change:
  Clear cpuid.07H.0.ebx[14]
  Clear cpuid.0DH.0.eax[4:3]
- vMSR change:
  Add MSR_IA32_BNDCFGS to un-supported MSR array.
- XCR0[4:3] is not allowed to set by guest.

Tracked-On: #2821
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-20 13:07:31 +08:00
dongshen 71ce4c255e HV: unify the sharing mode and partition mode coding style for similar functions
Both sharing mode and partition mode should follow the same coding logic/style
for similar functions:

vdev cfgread/cfgwrite: should all return -ENODEV if the pci reg access is not handled by
it, but previously the partition mode code is not following this logic

vpci cfgread/cfgwrite: if the vdev cfgread/cfgwrite does not handle this reg,
pass on to next vdev cfgread/cfgwrite, if no vdev handles that req, passthru to
physical pci device

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-20 12:04:42 +08:00
dongshen 026250fd8a HV: centralize the pci cfg read/write sanity checking code
Do the pci cfg read/write sanity checking before the request is dispatched to
submodules, so that the checking is centralized rather than scattered across multiple
files/places

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-20 12:04:42 +08:00
dongshen a403128a46 HV: remove vpci ops
Do not call vpci ops, call the corresponding sharing mode/partition functions
directly instead.

Remove struct vpci_ops from vpci.h

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-20 12:04:42 +08:00
dongshen aa1ee9424c HV: declare and export vpci ops functions as global instead of static local
In preparation for vpci ops function removal, so that these functions can be
called directly instead by vpci code

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-20 12:04:42 +08:00
dongshen a7f528cfd0 HV: remove vdev ops for partition mode
Remove vdev ops for partition mode, change related code to directly call the corresponding
functions instead

Remove struct pci_vdev_ops from vpci.h

Add @pre for pci_find_vdev_by_pbdf and pci_find_vdev_by_vbdf/partition_mode_vpci_init

Change the return value from int32_t to void to comply with misra c and
add ASSERT/panic in the functions (if necessary):
 vdev_hostbridge_init
 vdev_hostbridge_deinit
 vdev_pt_init
 vdev_pt_deinit

Still use pr_err in partition_mode_cfgread and partition_mode_cfgwrite to check if vdev cfgread/cfgwrite
access is aligned on 1/2/4 bytes, which is the only case that vdev cfgread/cfgwrite will return
nonzero, pr_err will be removed in subsequent patch titled "unify the sharing
mode and partition mode coding style for similar functions"

Remove @pre for local variables

Add ASSERT in partition_mode_pdev_init to check if pdev is NULL (user config
error)

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-20 12:04:42 +08:00
Sainath Grandhi b1cc18810e hv: Use domain/device specific invalidation for DMAR translation caches
ACRN uses global invalidation for all DMAR translation caches. Whenever
a UOS is shutdown or rebooted, it ends up clearing entries in translation
caches belonging to other VMs/domains. This patch adds support for
domain/device level invalidation for DMA translation caches and index
based invalidation for Interrupt Remapping Cache.

Tracked-On: #2738
Signed-off-by: Sainath Grandhi sainath.grandhi@intel.com
Acked-by: Eddie Dong eddie.dong@intel.com
2019-03-20 09:13:07 +08:00
Zide Chen 5c04687967 hv: minor fixes to a few calls to strncpy_s()
strncpy_s(d, dmax, s, slen): the 'dmax' includes the null terminator, while
slen doesn't. Thus if (dmax == slen == strlen(s)), strncpy_s() chooses to
discard the last character from s and instead write '\0' to d[dmax - 1].

strnlen_s(s, maxsize): if there is no terminating null character in the
first maxsize characters pointed to by s, strnlen_s() returns maxsize.

So in the following example or similar cases, we need to increase the size
of d[] by 1 to accommodate the null terminator, and add '1' to the dmax
argument to strncpy_s().

uint8_t d[MAX_LEN];
size = strnlen_s(s, MAX_LEN);
strncpy_s(d, MAX_LEN, s, size);

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
2019-03-20 08:55:42 +08:00
Geoffroy Van Cutsem 5fdc7969fd doc: add tutorial on how to increase the UOS disk size
Add a tutorial on how to increase the disk size of a User OS (UOS)
based on Clear Linux. The tutorial is largely inspired from Clear Linux
tutorial and refers to it. It mostly explains how to resize the .img
file using the 'qemu-img' tool since ACRN does not have any dedicated
tool for manipulating virtual disk image files.

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Co-Authored-By: David B. Kinder <david.b.kinder@intel.com>
2019-03-19 09:36:39 -04:00
Geoffroy Van Cutsem 657ac49772 doc: add rdmsr/wrmsr to the "ACRN Shell Commands" documentation
Add 'rdmsr' and 'wrmsr' to the "ACRN Shell Commands" documentation. Both are
already described via the interactive help command but not (yet) included in our
on-line documentation.

Tracked-On: #2684
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2019-03-19 09:32:39 -04:00
Shiqing Gao 90b49375e4 doc: add rules related to implementation-specific behaviors
This patch adds some rules related to implementation-specific
behaviors.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2019-03-19 08:46:19 -04:00
Li, Fei1 e131d7059a hv: vmconfig: minor fix about regression of commit 79cfb1
commit 79cfb1 forgot to add GUEST_FLAG_ prefix for LAPIC_PASSTHROUGH
in file arch/x86/configs/dnv-cb2/partition_config.h

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-19 19:09:36 +08:00
Junjie Mao 9abd469da2 config: unify board names to lowercase
Currently board names are used inconsistently across the project.

* Name of defconfigs for various boards use lowercase.
* Directory of config files for various boards use lowercase.
* CONFIG_BOARD uses uppercase.

This confuses the configuration scripts and leads to unintended overwriting of
.config, as well as missing of board-specific headers during compilation because
the include paths are case-sensitive.

This patch converts the default board names to lowercase to resolve such
issues. Users are still free to define their own boards in either uppercase or
lowercase as long as they keep the cases consistent.

Tracked-On: #2794
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2019-03-19 19:08:59 +08:00
Zide Chen 5398c901f6 hv: remove CONFIG_PARTITION_MODE for pre-launched VM vE820 creation
Preparing for hybrid mode:

- create vE820 for pre-launched VMs and do other init code when the
  vm_config->type is PRE_LAUNCHED_VM.
- create ve820.c for each board because without wrapping by
  CONFIG_PARTITION_MODE, ve820_entry[] needs to be visible even when
  compiling target boards that haven't enabled pre-launched VMs.
- remove create_prelaunched_vm_e820() from vm.c and implement board
  specific function for each $(CONFIG_BOARD)/ve820.c. The reasons being:
  - don't need to define ve820_entry[32] for those boards that don't
    support pre-launched VMs.
  - more importantly, this makes it much easier to create different per-VM
    vE820 when it's needed.

Tracked-On: #2291
Signed-off-by: Zide Chen <zide.chen@intel.com>
2019-03-19 14:28:43 +08:00
Victor Sun ca6e341147 HV: add vrtc for sharing mode
Previously vrtc is for partition mode only, now enable it for sharing mode;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-19 13:45:32 +08:00
Qi Yadong 1b79f28efe hv: update CR0/CR4 on demand in run_vcpu()
Suppose run_ctx.cr0/cr4 are correct when do world switching, so call
vcpu_set_cr0/cr4() to update cr0/cr4 directly before resume to guest.
This design is only for trusty world switching.

Tracked-On: #2773
Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-19 09:57:08 +08:00
dongshen 19c5342506 HV: remove vdev ops for sharing mode
Remove vdev ops for sharing mode, directly call the corresponding functions
instead of calling the ops callbacks (indirectly)

Remove alloc_pci_vdev() and merge its code into init_vdev_for_pdev() to simplify code

Remove @pre for local variables

Change the return value from int32_t to void to comply with misra c and
add ASSERT in the functions (if necessary) to verify the assumptions for debug build:
 vmsi_init
 vmsix_init
 vmsi_deinit
 vmsix_deinit

Add @pre for vmsix_init_helper and make it a void function, use ASSERT to verify
the assumption for debug build.

Add ASSERT in get_sos_vm

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-18 10:08:10 +08:00
dongshen eb4f46987a HV: add const qualifier for the deinit vdev op functions
This is to fix the following misra c violation:
Pointer param should be declared pointer to const. : vdev

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-18 10:08:10 +08:00
dongshen b2b1a278f0 HV: remove intercepted_gpa and intercepted_size from struct pci_msix
No need to use these 2 variables as global (per pci_misx), can simply use local
variables in code instead.

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-18 10:08:10 +08:00
dongshen 5767d1e141 HV: extract common code blocks to has_msi_cap and has_msix_cap functions
Define has_msi_cap and has_msix_cap inline functions to do sanity checking for
msi and msix ops, the corresponding code block in existing code is replaced with
a call to these new functions.

A few minor coding style fix.

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-18 10:08:10 +08:00
Li, Fei1 79cfb1cf58 hv: vmconfig: format guest flag with prefix GUEST_FLAG_
To make the code more readable.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-16 17:14:12 +08:00
Li, Fei1 c018b853e9 hv: vmtrr: hide mtrr if hide_mtrr is true
Now we only configure "hide MTRR" explicitly to false for SOS. For other VMs,
we don't configure it which means hide_mtrr is false by default.
And remove global config MTRR_ENABLED

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-16 17:14:12 +08:00