Commit Graph

163 Commits

Author SHA1 Message Date
Minggui Cao ac5da17e52 enable rdtscp instruction for guest OS all vCPUs
before just AP can run "rdtscp" intruction, if run it on BSP,
it will cause "illegal instruction"; now align BSP & AP.
also remove duplicated code.

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-05-15 17:25:55 +08:00
Yonghua Huang 3c119e124a check validity of 'VM-exit Int-Info' before extracting vector
1. exception vector and other information
   can be extracted from 'VM-Exit Interrupt-Information'
   field of VMCS only if bit31 (Valid) is set.
   -Intel SDM 24.9.2, Vol3

2.  Rename 'exit-interrupt_info' to 'idt_vectoring_info'
    in 'struct vcpu_arch', which is consistent with
    SDM 24.9.3, Vol3

3. 'IDT-vectoring information' in VMCS is 32bit
    -Intel SDM 24.9.3, Vol3

    Update the type of 'idt_vectoring_info' in
    'struct vcpu_arch'from 'uint32_t' to 'uint64_t'.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:25:55 +08:00
Zhao Yakui 6b4ad0b449 HV: Add the volatile to avoid optimization for mmio_read/write access
If subsequent write is on the same address, maybe the compiler will optimize
the access of MMIO memory and only the last write takes effect.In such case
it is wrong. For example:
  mmio_write_long(0x25, addr);
  mmio_write_long(0x26, addr);
  mmio_write_long(0x27, addr);

After volatile is added, it can avoid the above possible optimization and
assure that each write takes effect.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:55 +08:00
Zhao Yakui 24739708c3 HV: Remove the unused mmio_or/and/rmw operation
The mmio_or_long/mmio_and_long/mmio_rmw_long is defined to perform
the read & write operation. But they are not used. So they are removed.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:55 +08:00
Yan, Like 51a76a93fb hv: save early hv logmsg before sos booted
Add percpu earlylog sbuf within hypervisor memory space to accommodate log
before sos booting, and copy the earlylog to SOS allocated sbuf at the first
do_logmsg after SOS sets the sbuf during booting.

With the patch, earlylog of hypervisor could be captured with acrnlog
service if SOS booted. And it may help debugging hv issue if SOS failed to
boot, with "logdump" command.

Signed-off-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-05-15 17:25:55 +08:00
Yan, Like c61559a336 hv: remove spinlock_irq_obtain/spinlock_irq_release
These APIs are not used, and not as safe as spinlock_irqsave_obtain/
spinlock_irqrestore_release.

Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-05-15 17:25:55 +08:00
Zheng, Gen db4e3f87bf bootparam: bug fix on address convertion
Before pasing commandline from boot param, switch the phisical address
of param to virtaul address.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
2018-05-15 17:25:55 +08:00
Zheng, Gen 2a37a4de71 ACPI: bug fix on address convertion
Before referencing to phisical address of acpi tables, switch it to
virtual address.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
2018-05-15 17:25:55 +08:00
Zheng, Gen c5f860e1cb MMU: bug fix on operating va <=> pa convertion
Before referencing to physical address of devs such as lapic, ioapic,
vtd, and uart, switch to virtual address.
Use a phisical address of pml4 to write CR3.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
2018-05-15 17:25:55 +08:00
Zheng, Gen d02f4d4a5f refine: change the address arguments type of mmio access api
Change the address arguments type of mmio access api from uint64_t
to void*.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
2018-05-15 17:25:55 +08:00
Yonghua Huang 11d0e59b3e revise type of 'exit_reason' and 'inst_len' in vcpu_arch
SDM 24.9.1 Volume3:
 - 'Exit reason' field in VMCS is 32 bits.

 SDM 24.9.4 in Volume3
 - 'VM-exit instruction length' field
   in VMCS is 32 bits.

 This patch is to redefine the data types of above fields
 in 'struct vcpu_arch' and udpate the code using these
 two fields.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:25:55 +08:00
Li, Fei1 4116ddd2a0 hv: mmu: replace cpu feature/capability detect with cpu_has_cap
Since we get cpu feature/capability in boot_cpu_data at boot initialization,
then there no need to get this feature/capability using cpuid again.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:55 +08:00
Li, Fei1 80d194cfb5 hv: vmx_capability: add cpu_has_vmx_ept/vpid_cap API
Refine and simple vmx_capability API defination.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:55 +08:00
Li, Fei1 d7d2ef8c88 hv: xsave: remove is_xsave_supported
Update X86_FEATURE_OSXSAVE when enabled and replace is_xsave_supported
with cpu_has_cap(X86_FEATURE_OSXSAVE).

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:55 +08:00
Li, Fei1 6560ff367c hv: cpu: add cpu_has_cap() API
Add cpu_has_cap API for cpu feature/capability detect instead of
add get_xxx_cap for each feature/capability detect.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:55 +08:00
Yonghua Huang bb011a4316 rename vmexit handlers
this patch is to align the suffix of the handlers' name.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:25:55 +08:00
Zheng, Gen 6b1782b360 refine: remove redundant data type definition
remove data defination of mmio_addr_t, vaddr_t, paddr_t,
and ioport_t.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
2018-05-15 17:25:54 +08:00
Jack Ren f3db18b981 version: v0.1-rc4
Signed-off-by: Jack Ren <jack.ren@intel.com>
2018-05-15 17:25:50 +08:00
Zheng, Gen c8116fc7c9 spinlock: bug fix in spinlock code
Using ebx will truncate the high 32bit part of 64bit virtual address.
So using rbx instead of ebx.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Reviewed-by: Yakui, Zhao <yakui.zhao@intel.com>
2018-05-15 17:25:27 +08:00
Zheng, Gen c5fabf55a0 sprintf: bug fix in sprintf implemented code
In the case that the copy sz is 0, it is unnecessary to do copy.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Reviewed-by: Chen, Jason Cl <jason.cj.chen@intel.com>
Reviewed-by: Yakui, Zhao <yakui.zhao@intel.com>
2018-05-15 17:25:27 +08:00
Yonghua Huang 9b37e1464c add IO requrest 'req_buf' check before reference
This address maybe invalid if a hostile address was set
in hypercall 'HC_SET_IOREQ_BUFFER'.it should be validated
before using.

Update:
  -- save HVA to guest OS's request buffer in hyperviosr
  -- change type of 'req_buf' from 'uint64_t' to 'void *'
  -- remove HPA to HVA translation code when using this addr.
  -- use error number instead of -1 when return error cases.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:25:27 +08:00
Fei Jiang 3a3aeac09f VMX: change PAT register default value
This is workaround patch to resolve Disti performance issue.
In kernel 4.14, PAT is skipped to initialize if MTRR is not enabled,
while graphics driver need set WC to GGTT memory to accelerate memcpy,
if PAT is not initialized, default PAT register will treat UC- as
uncacheable, which will impact gfx performance. Change PAT default
register value to treat UC- as WC to workaroud this problem.

Revert me when PAT/MTRR strong correlation is removed in kernel.

Signed-off-by: Fei Jiang <fei.jiang@intel.com>
2018-05-15 17:25:27 +08:00
Zheng, Gen 52c020c6f0 VMX: bug fix on operating vmx
Switch all the referenced virtual address to physical address
include ept mapping, vmcs field, vmxon, vmclear, and vmptrld.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Reviewed-by: Chen, Jason Cl <jason.cj.chen@intel.com>
Reviewed-by: Yakui, Zhao <yakui.zhao@intel.com>
Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
2018-05-15 17:25:27 +08:00
Zheng, Gen 7ed446e63b ptdev: bug fix on operating list
Before using a node of list, initialize it.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Reviewed-by: Yakui, Zhao <yakui.zhao@intel.com>
Reviewed-by: Chen, Jason Cl <jason.cj.chen@intel.com>
2018-05-15 17:25:27 +08:00
Minggui Cao 72b2cb1fa7 remove deadcode of rdtsc_handler/rdtscp_handler
Guest OS rdtsc/rdtscp doesn't trap into hypervisor, so remove them.

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:27 +08:00
Jason Chen CJ 1e2c201827 vtd: add page allocation check for root_table & context_table
if failed to allocate page structure for root_table or context_table,
ASSERT system and return.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-15 17:25:27 +08:00
Jason Chen CJ 4ea7588241 vtd: context_table_addr should be hpa
add necessary HPA2HVA/HVA2HPA transition for context_table_addr

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-05-15 17:25:27 +08:00
Jason Chen CJ 403076e6b9 vtd: dmar_uint->root_table_addr should be hpa
add necessary HPA2HVA/HVA2HPA transition for root_table_addr

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-05-15 17:25:27 +08:00
Zheng, Gen 3847a4d1a9 hypercall: bug fix on the address convertion while hypercall
Before copy data between guest and host, should convert the GPA
to HVA and do the copy.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Reviewed-by: Chen, Jason Cl <jason.cj.chen@intel.com>
Reviewed-by: Yakui, Zhao <yakui.zhao@intel.com>
2018-05-15 17:25:27 +08:00
Jason Chen CJ ebba622d78 mmu: add mmu invlpg support
when host mmu got updated, it should invalidate TLB & page-struct cache.

currently, there is no mmu update will be done after any AP start, so the
simplest way(to avoid shootdown) is just do invlpg for BSP.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-05-15 17:25:27 +08:00
Jason Chen CJ 2d6c75408e mmu: refine the checking of entry present
- change the input param of check_page_table_present from struct map_params
  to page_table_type
- check EPT present bits misconfiguration in check_page_table_present
- change var "table_present" to more suitable name "entry_present"

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-15 17:25:27 +08:00
Jason Chen CJ 60425f91b4 mmu: add ept execution only capability check
check IA32_VMX_EPT_VPID_CAP MSR to see if ept execution only capability
is supported or not

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-15 17:25:27 +08:00
Jason Chen CJ b7d57a946b cpu: change cpu_halt name to cpu_dead
cpu_halt actually mean cpu dead in current code, so change it with
more clear name.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-15 17:25:27 +08:00
Jason Chen CJ 96f7ff3be1 cpu: add physical cpu active bitmap support
use pcpu_active_bitmap presents which cpu is active

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-15 17:25:26 +08:00
Mingqiang Chi 0a0ff19eaa hv: Remove hpet from acrn.conf
Remove clocksource=hpet from SOS kernel cmdline, as ACRN is providing
tsc and hpet will not be supported in the future

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-05-15 17:25:26 +08:00
Binbin Wu d0c773f22d vtd: fix memory coherency issue of vtd table
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-15 17:25:26 +08:00
Binbin Wu 4c6f11fe8d mmu: add cflush api
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-15 17:25:26 +08:00
Yonghua Huang a0b7fb81b4 Add range check for 'vm0_gpa' before creating EPT
Input('vm0_gpa') should be validated when handling
hypercall 'HC_VM_SET_MEMMAP to create EPT for UOS
in 'hcall_set_vm_memmap()' function.
at least 'hpa' range (from 'vm0_gpa') can't overlap
hypervisor memory region.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:25:26 +08:00
Yonghua Huang 06bd73c765 remove 'noxsave' in acrn.conf
- xsave is enabled for guests

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:25:26 +08:00
Rusty Lynch 6e15aee3b0 Fix warning about unused variable
Signed-off-by: Rusty Lynch <rusty.lynch@intel.com>
2018-05-15 17:25:26 +08:00
Geoffroy Van Cutsem e479924890 Add 'findutils' to Fedora-based Docker images
The 'find' command was not installed in our minimal Fedora 26
and 27-based Docker images. This resulted in a non-fatal error
when performing a 'make clean'. This commit adds this utility
(available in the 'findutils' package).

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-05-15 17:25:26 +08:00
Jason Chen CJ f98a7ca90a vlapic: apicv_get_apic_access_addr should get hpa
APIC-access page which write into VMCS should be hpa

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:26 +08:00
Jason Chen CJ 241efb2da6 vlapic: apicv_get_apic_page_addr should get hpa
virtual-ACPI page which write into VMCS should be hpa

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:26 +08:00
Qi Yadong ef0c5ec2e3 hv: cache tsc_offset
Guest write tsc: cache the offset into run_context.tsc_offset;
Guest read tsc : use run_context.tsc_offset to calculate guest_tsc.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:26 +08:00
Mingqiang Chi 51414536fa hv:add suffix(UL)for MACRO(SECURE_WORLD_ENABLED)
Now the MACRO SECURE_WORLD_ENABLED (1<<0)
Change it to 64 bit data
SECURE_WORLD_ENABLED (1UL<<0)

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:26 +08:00
Mingqiang Chi 9aa9a77457 mmu:create temporary page tables for guest at run time
Before this patch, guest temporary page tables were generated by hardcode
at compile time, HV will copy this page tables to guest before guest
launch.

This patch creates temporary page tables at runtime for the range of 0~4G,
and create page tables to cover new range(511G~511G+16M) with trusty
requirement.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:26 +08:00
Zheng, Gen 4d0f26d0e1 UEFI: update acrn.conf and Document
Since the boot flow had been changed to that sos kernel is lanuched
by cl bootloader directly, replace the payload acrn.efi with bzImage.efi
in the acrn.conf file, and specify ROOTDEV with UUID in the command line.

The UEFI firmware launches the EFI/org.clearlinux/bootloaderx64.efi
as os loader not the EFI/BOOT/BOOTX64.EFI, so fix the issue in the document
ACRN_UEFI.txt which guides user with incorrect steps.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Reviewed-by: Jack, Ren <jack.ren@intel.com>
2018-05-15 17:25:26 +08:00
Qi Yadong 7430074a12 trusty: initialize tsc_offset to zero
Per trusty design, trusty requires a monotonic increasing
secure tick(TSC) at run time. This secure tick will used
to mitigate password/pin force attack, control key expiration,
etc.

Currently, the TSC_OFFSET is enabled. And guest will got
(host_tsc + tsc_offset) when execute rdtsc/rdtscp/rdmsr to
aquire tsc value. The host_tsc is always keeping increasing
during the runtime.

So initialize tsc_offset of trusty to 0 will ensure the
secure tick feature.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:25 +08:00
Jason Chen CJ bf36022ce9 ept: change eptp to PA
eptp should be record as PA.

this patch changed nworld_eptp, sworld_eptp and m2p eptp to PA type,
necessary HPA2HVA/HVA2HPA transition is used for them after the change.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:25 +08:00
Jason Chen CJ 8682552273 mmu: identify VA and PA in mmu.c
- read/write page table entries should use VA which defined as "void *"
- the address data in page table entries should us PA which defined as
  "uint64_t"

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:25 +08:00