Commit Graph

99 Commits

Author SHA1 Message Date
Mingqiang Chi bdcc3aef22 hv: fixed compiling warning
removed some unnecessary variables and functions.

v1-->v2:
   Replace div-by-zero with an inline ASM code

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-17 12:36:53 +08:00
Zhao Yakui 36d5fdbf04 DM/Samples: Add the boot option of "i915.enable_guc=0" to disable guc on SOS new kernel
The guc boot option is refined on the new linux kernel. The boot option of
"i915.enable_guc=0" should be added in order to disable Guc instead of using
"enable_guc_loading/submission". But in order to use the same boot option on
multi kernel, both of them are kept.

V1->V2: Add the option on APL-NUC platform

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Binbin Wu<binbin.wu@intel.com>
2018-08-16 16:28:17 +08:00
Victor Sun bb5377b354 HV: change wake vector info to accommodate ww32 sbl
The wake vector address in SBL ACPI table was changed since ww30,
so change platform acpi info accordingly to support system S3.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-15 12:20:28 +08:00
Sainath Grandhi c25a62e5b0 hv: Create E820 entries for OS in partitioning mode ACRN
1) This patch creates static E820 entries for VMs launced by ACRN in
partition mode.
2) Moves vm_description entries from bsp/sbl/ to partition/
3) Removes unused API get_vm_desc_base

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-13 13:58:32 +08:00
Sainath Grandhi 7380c167ed hv: Add vuart flag to VM descriptions in partition mode
ACRN in partition mode emulates UART for the VMs directly launced
from HV. This patch adds an option to enable/disable vUART for a
VM.

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-13 09:34:35 +08:00
Sainath Grandhi e40b998d21 hv: Add EPT mapping for UOS in partitioning mode
Adding code to map memory for UOS in partitioning mode ACRN.
HPA starting above 4GB is used for UOS memory. Supports only contiguous memory
from host for UOS. Current implementation supports only 2 GB for UOS memory.

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-10 10:22:06 +08:00
Binbin Wu 33e1149b29 hv: init: unify init logic for vm0 bsp
In current code, VM0 BSP start mode is hardcoded, in this patch VM0 BSP
start mode is decided by the boot context prepared by bootloader/BIOS.

In current code, VM0 BSP VMCS is override only on UEFI platform.
In this patch, VM0 BSP VMCS is override on both SBL & UEFI platforms.

Also restructure the code of guest init code.
In this patch, a vcpu run_context is initilaized first according to vcpu mode.
Then write the value to vmcs according to run_context value.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-09 16:43:58 +08:00
Binbin Wu 43db87cfed hv: rename acrn_efi.h to vm0_boot.h
The structures defined in acrn_efi.h is x86 related, move it
to acrh/x86/guest/.
Also, the headfile will be used on both SBL & UEFI platforms,
rename it to vm0_boot.h

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-09 16:43:58 +08:00
Sainath Grandhi ff96453993 hv: Boot multiple OS for Partitioning mode ACRN
ACRN in partitioning mode boots multiple OS. Adding code to parse
VM description structure and a reference description structure for
booting 2 OSes.

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-09 15:01:57 +08:00
Jason Chen CJ 3d5d6c96ec vcpu: add get/set register APIs
there will be 3 types of vcpu runtime contexts:
- runtime contexts always saved/restored during VM exit/entry, which
  include general registers rax/rcx/rdx/rbx/rbp/rsi/rdi/r8~r15, cr2 and
  msr for spectre control (ia32_spec_ctrl)
- runtime contexts on-demand cached/updated during VM exit/entry, which
  include frequently used registers rsp, rip, efer, rflags, cr0 and cr4
- runtime contexts always read/write from/to VMCS, which include left
  registers not in above

this patch add get/set register APIs for vcpu runtime contexts, and unified
the save/restore method for them according to above description.

v3:
- update vcpu_get/set_cr0/4 as unified interface to get/set guest cr0/cr4,
  use on-demand cache for reading, but always write to VMCS for writing.

v2:
- use reg_cached/reg_updated for on-demand runtime contexts
- always read/write cr3 from/to VMCS

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-07 09:55:13 +08:00
Mingqiang Chi 93ed0371a0 hv:cleanup console/uart code
-- Check uart enabled flag, it will return if the flag is false.
-- Add function declaration (uart16550_set_property) in console.h
-- Remove unnecessary function declaration(get_serial_handle)
-- Change uart_enabled and port_mapped to bool
-- Fix MISRA-C integer violations

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-02 11:25:40 +08:00
Jason Chen CJ 9ea50a5286 acrn.conf: remove maxcpus from cmdline
after SOS start with all CPUs, it should not set maxcpus in cmdline

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-07-27 11:01:40 +08:00
Jason Chen CJ 589c72382a add CONFIG_VM0_DESC support
if defined CONFIG_VM0_DESC, HV will use predefined vm0_desc to config
VM0, otherwise, HV will run VM0 with all physical cpus.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-25 17:18:14 +08:00
Victor Sun f18a02ac61 HV: misra cleanup for platform acpi info
- fix misra integral type violations;

- change struct initilization style to make code more readable;

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-24 13:45:43 +08:00
Victor Sun ee13110278 HV: change wake vector address to accommodate sbl
- The previous wake vector address just work for ABL, need to change it
  to accommodate the latest SBL;

- Fix wrong bit width value in the pm1a gas;

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-24 13:45:43 +08:00
Zide Chen a368b57eca hv: fix typo in relocation code
Fixed a typo in 621425da20 ("hv: further fix to configurable
relocation"). It shoud allocate fixed address if CONFIG_RELOC is
not defined.
2018-07-24 10:17:01 +08:00
Binbin Wu 4fd870f718 hv: efi: remove multiple defined struct efi_ctx & dt_addr_t
In current code, struct efi_ctx and dt_addr_t are defined in two places.
This patch removes one copy of the definitions.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Jack Ren <jack.ren@intel.com>
2018-07-23 10:35:32 +08:00
Junjie Mao 112b5b820c HV: guest: cleanup of remaining integral type violations
Clean up most reported integral-type-related violations still existing under
arch/x86/guest/. The remaining reports that are not trivial to suppress will be
explained in separate documents.

Also move acpi_info outside acrn_common.h as the structure is no longer shared
with DM.

v1 -> v2:

    * Move struct acpi_info to bsp_extern.h

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-23 10:23:49 +08:00
ailin,yang b2e676a2f0 update kernel-pk version to align with ACNR v0.1
update kernel-pk version to align with ACRN v0.1 release
2018-07-17 11:53:15 +08:00
Zide Chen 621425da20 hv: further fix to configurable relocatoin
commit ia23549aa915e7dc2c ("build: make relocation-related code
configurable") adds CONFIG_RELOC to make relocation configurable

This patch corrects the behavior when CONFIG_RELOC is disabled
- Don't use "CFLAGS += -fpie" and put back "LDFLAGS += -static"
- __emalloc(): forced to allocate exactly the asked address, which is
  CONFIG_RAM_START
2018-07-16 13:05:04 +08:00
Junjie Mao 4627cd4de0 HV: build: drop useless files
This patch drops the following useless files in the hypervisor:

* bsp/*/include/: After commit c849bff850 ("HV: config: adapt to the generated
  config.h") these headers are obsolete for configuration. Drop the directories
  and move the generated version.h under $(HV_OBJDIR)/include.

* all_header.c: This is a temporary file for checking violations in headers,
  which is accidentally checked in by commit 3956ce1596 ("HV: io: spell out
  explicit narrowing of integers").

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-13 14:53:27 +08:00
Huihuang Shi e3302e87e8 HV:transfer vm_hw_logical_core_ids's type and rename it
rename vm_hw_logical_core_ids to vm_pcpu_ids
and changed the type to uint16_t.

V1->V2:rename the vm_hw_logical_core_ids

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-13 13:05:29 +08:00
Minggui Cao 4cab8b9cc5 HV: code cleanup as MISRA-C report for guest/vmsr
like: constant of unsigned int need add U/UL as surfix.
enum value can't use to give or compare with int directlly.
unsigned and signed mis-matched

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-12 17:27:53 +08:00
Zide Chen 6c9e451b41 hv: EFI can load Hypervisor to address other than COMNFIG_RAM_START
- UEFI: change __emalloc() function to allocate from any available memory
  under 4G
- Define CONFIG_RAM_START to the lowest possible address 1M, making sure
  HV can only be relocated to higher address

Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Yin fengwei <fengwei.yin@intel.com>
2018-07-11 10:25:16 +08:00
Zide Chen 84d9da1d6a hv: build hypervisor as PIE (position-independent executable)
Build and link hypervisor with "-pie" and remove static linking so that
it generates .rela sections for relocation

Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Yin fengwei <fengwei.yin@intel.com>
2018-07-11 10:25:16 +08:00
Xiangyang Wu 474e9af216 HV:CPU: Add 'U/UL' for unsigned const value
According to MISRA C:2012, suffix 'U/UL' shall be for
unsigned const value, the member of enum variable should
not be used to compare with integer variable.

Add 'U/UL' for unsigned const value in the CPU module;
Use Macro insteading of enum feature_word since the member
of feature_word is used to compare with integer variable;
Use hex number insteading of Macro in the assembly code.

V1-->V2:

        Update the suffix of some constant value as 'UL'
        according to its'storage variable;
        Split MACRO updates used in the assembly code
	in other patch.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-09 10:27:21 +08:00
Mingqiang Chi 666430a3d4 hv:fix "missing for discarded return value" for memset
No need to check the return value for memset
code like this:
int a(void) {
	return 0;
}
int b(void){
	a();
}
fix as follow:
int a(void) {
	return 0;
}
int b(void){
	(void)a();
}

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-05 14:14:48 +08:00
Jason Chen CJ 6ca99713dd Revert "hv: More changes to enable GPU passthru"
This reverts commit 8d50d40ff8.
2018-07-05 11:06:47 +08:00
Huihuang Shi 2ffa69cb9a HV:misc:fix "signed/unsigned conversion without cast"
Misra C required signed/unsigned conversion with cast.

V1->V2:
  a.split patch to patch series

V2->V3:
  a.change the uint64_t type numeric constant's suffix from U to UL

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-04 12:18:38 +08:00
Yonghua Huang bbdb204750 HV:- Refine strtol() & strtoul()
- replace 'strtol()' with 'strtol_deci()'
    -- supports string with decimal format

 - replace 'strtoul()' with 'strtoul_hex()'
    -- support string with hex format

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 15:47:07 +08:00
Anitha Chrisanthus 8d50d40ff8 hv: More changes to enable GPU passthru
Snoop control is not supported in the graphics VT-d engine and so should
be disabled in the PTEs. Also enabled iommu for graphics in the
dmar_drhd array.

v2: removed disable iommu in handle_one_drhd and combined if cond.
v3: minor code review changes
v4: moved the snoop control change to ept.c to accomodate upstream changes
Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
Reviewed-by: Gong Zhipeng <zhipeng.gong@intel.com>
2018-06-29 00:50:01 +08:00
Mingqiang Chi 6d46749d0f hv: fix android boot fail on 4GB memory board
Config remained 1GB page to 1 on 4GB memory

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-06-25 12:38:31 +08:00
Li Zhijian 4de9e1b4c0 HV Makefile: fix detection of gnu-efi tools location
The previous logic assumes LIBDIR to be /usr/lib64 if it exists.
some x86_64 distros, like ubuntu and debian, the default x86_64 libs(gnu-efi)
are installed into /usr/lib while /usr/lib64 is for i386
~/workspace$ dpkg -L gnu-efi | grep elf_x86_64_efi.lds
/usr/lib/elf_x86_64_efi.lds

~/workspace$ dpkg -S /usr/lib64
libc6-amd64:i386: /usr/lib64

so it failed to compile efi perviously as following errors:
-----------------
ld: cannot open linker script file /usr/lib64/elf_x86_64_efi.lds: No such file or directory
Makefile:102: recipe for target '/home/lizj/workspace/acrn-hypervisor/build/hypervisor/bsp/uefi/efi/boot.so' failed
make[2]: *** [/home/lizj/workspace/acrn-hypervisor/build/hypervisor/bsp/uefi/efi/boot.so] Error 1
make[2]: Leaving directory '/home/lizj/workspace/acrn-hypervisor/hypervisor/bsp/uefi/efi'
Makefile:191: recipe for target 'efi' failed
make[1]: *** [efi] Error 2
-----------------

v3: Keep the LIBDIR determination logic for linking ('-lgnuefi -lefi').
v2: addressed Geoffroy's comments

Acked-by: "VanCutsem, Geoffroy" <geoffroy.vancutsem@intel.com>
Signed-off-by: Li Zhijian <lizhijian@cn.fujitsu.com>
2018-06-22 17:17:14 +08:00
Junjie Mao aa505a28bb HV: treewide: convert hexadecimals used in bitops to unsigned
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-06-21 13:12:39 +08:00
Huihuang Shi be0f5e6c16 HV:treewide:fix "expression is not Boolean"
MISRA C explicit required expression should be boolean when
in branch statements (if,while...).

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-20 14:19:47 +08:00
Min He e3174bb50a script: add plane restriction parameters for NUC
This patch added GVT-g feature and support of plane restriction for APL
NUC platforms.

Signed-off-by: Min He <min.he@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Jiang, Fei <fei.jiang@intel.com>
2018-06-20 13:24:08 +08:00
Junjie Mao 8009cccb52 HV: make: manage debug/release build in kconfig
This patch introduces a configuration symbol RELEASE for managing debug/release
build in a similar way to how we manage PLATFORM.

Note:

1. 'make defconfig RELEASE=1' will still use the CONFIG_RELEASE defined in the
   default configuration. The 'RELEASE=1' option has no effect in this case.

2. 'make RELEASE=1' is backward-compatible and enforces a release version to be
   built.

v1 -> v2:

    * Pass RELEASE instead of CONFIG_RELEASE to silentoldconfig.py to avoid
      unintended overriding of the value.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Geoffroy VanCutsem <geoffroy.vancutsem@intel.com>
2018-06-15 15:50:09 +08:00
Victor Sun 9a56024b49 HV: load host pm S state data while create vm0
The pm S state data is from host ACPI info and needed for S3/S5
implementation.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-13 15:02:03 +08:00
Victor Sun 88e1c4975c HV: add bsp acpi info support
On some occations HV operates relying on host acpi info, we can use a
c file to store this data. The data could be hardcoded or use offline
tool that run on target first and then generate the file automatically.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-13 15:02:03 +08:00
Yin Fengwei 5414d57ac4 hv: Fix typo of trampline with trampoline
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-12 15:54:16 +08:00
Zide Chen 2a1a6ad0af hv: Other preparation for trampoline code relocation
- For UEFI boot, allocate memory for trampoline code in ACRN EFI,
  and pass the pointer to HV through efi_ctx
- Correct LOW_RAM_SIZE and LOW_RAM_START in Kconfig and bsp_cfg.h
- use trampline_start16_paddr instead of the hardcoded
  CONFIG_LOW_RAM_START for initial guest GDT and page tables

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-06-11 12:15:28 +08:00
Zide Chen 40c8c4d3c3 hv: Prepare trampline.S trampoline code relocation
in real mode part, add extra pointers for page tables and long jump buffer
so it's possible for HV code to patch the relocation offset

in long mode part, use absolute addressing when referring HV symbols,
and use relative addressing for symbols within trampoline code

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-06-11 12:15:28 +08:00
Zide Chen 77580edff0 hv: add memory allocation functions for trampoline code relocation
emalloc_for_low_mem() is used if CONFIG_EFI_STUB is defined.
e820_alloc_low_memory() is used for other cases

In either case, the allocated memory will be marked with E820_TYPE_RESERVED

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-06-11 12:15:28 +08:00
Junjie Mao c849bff850 HV: config: adapt to the generated config.h
This patch drops "#include <bsp_cfg.h>" and include the generated config.h in
CFLAGS for the configuration data.

Also make sure that all configuration data have the 'CONFIG_' prefix.

v4 -> v5:

    * No changes.

v3 -> v4:

    * Add '-include config.h' to hypervisor/bsp/uefi/efi/Makefile.
    * Update comments mentioning bsp_cfg.h.

v2 -> v3:

    * Include config.h on the command line instead of in any header or source to
      avoid including config.h multiple times.
    * Add config.h as an additional dependency for source compilation.

v1 -> v2:

    * No changes.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
2018-06-08 17:21:13 +08:00
Yin Fengwei f3831cdc80 hv: don't combine the trampline code with AP start
Cleanup "cpu_secondary_xx" in the symbols/section/functions/variables
name in trampline code.

There is item left: the default C entry is Ap start c entry. Before
ACRN enter S3, the c entry will be updated to high level S3 C entry.
So s3 resume will go s3 resume path instead of AP startup path.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-06-08 13:45:02 +08:00
Zide Chen 4bb5e60de5 hv: enable MTRR virtualization
- unmask MTRR from guest CPUID to enable MTRR
- MTRR virtualization can be disabled by commenting out CONFIG_MTRR_ENABLED

Signed-off-by: bliu11 <baohong.liu@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-08 12:06:15 +08:00
Huihuang Shi e591315a65 HV:treewide:C99-friendly per_cpu implementation change the per_cpu method
The current implementation of per_cpu relies on several non-c99 features,
and in additional involves arbitrary pointer arithmetic which is not MIS-
RA C friendly.

This patch introduces struct per_cpu_region which holds all the per_cpu
variables. Allocation of per_cpu data regions and access to per_cpu vari-
ables are greatly simplified, at the cost of making all per_cpu varaibl-
es accessible in files.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
2018-06-05 17:09:00 +08:00
David B. Kinder f4122d99c5 license: Replace license text with SPDX tag
Replace the BSD-3-Clause boiler plate license text with an SPDX tag.

Fixes: #189

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-06-01 10:43:06 +08:00
Jason Chen CJ 987c7b7511 remove unused parameters in vm_description
vm_attr_name, vm_state_info_privilege & vm_created are not used

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-31 11:27:01 +08:00
Kaige Fu 80a79fed39 HV: Replace printf with pr_acrnlog after logmsg init
There are some massages which is not fatal error but should to print
to serial and sbuf(hvlog) at the same time. pr_fatal is for fatal error
massages and it is not good choice for the situation above.

Introduce a new API pr_acrnlog to deal with the situation. And replace the
following printf with pr_acrnlog for massages should be print to sbuf and
serial. Then developers can get those massages on serial and BTM(Boot Time
Measurement) can use acrnlog to get those massages from sbuf.

BTM refers to Boot Time Measurement which will read acrnlog file to get
timestamps of steps we want.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:49:09 +08:00