Commit Graph

23 Commits

Author SHA1 Message Date
Li Fei1 a2fd8c5a9d pci: mcfg: limit device bus numbers which could access by ECAM
Per PCI Firmware Specification Revision 3.0, 4.1.2. MCFG Table Description:
Memory Mapped Enhanced Configuration Space Base Address Allocation Structure
assign the Start Bus Number and the End Bus Number which could decoded by the
Host Bridge. We should not access the PCI device which bus number outside of
the range of [Start Bus Number, End Bus Number).
For ACRN,  we should:
1. Don't detect PCI device which bus number outside the range of
[Start Bus Number, End Bus Number) of MCFG ACPI Table.
2. Only trap the ECAM MMIO size: [MMCFG_BASE_ADDRESS, MMCFG_BASE_ADDRESS +
(End Bus Number - Start Bus Number + 1) * 0x100000) for SOS.

Tracked-On: #5233

Signed-off-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-09-09 09:31:56 +08:00
Qian Wang 0267cc4ef1 HV: Fix SR-IOV problem on EHL
hv: vpci: Add 0x45, which is the high-byte of device id of EHL,
to the enumeration array in vhostbridge.c. This is to fix the
problem that PCIe extended capabilities like SR-IOV cannot be
used on EHL.

Tracked-On: #5256
Signed-off-by: Qian Wang <qian1.wang@intel.com>
2020-09-08 08:44:56 +08:00
Qian Wang 5d8f5023d0 HV: inject physical PCIEXBAR to SOS vhostbridge
hv: vpci: inject physical PCIEXBAR to SOS vhostbridge in
order to fully emulate a full host bridge following HW spec

The vhostbridge we emulate currently is a "Celeron N3350/
Pentium N4200/Atom E3900 Series Host Bridge", which is of
Appollo Lake SoC, but the emulation is incomplete, and
we need to implement a full vhostbridge following HW spec.

This is a step-by-step process, and in this patch we fixes
the simulation of PCIEXBAR register (0x60) and thus solved
bug #6464.

-------#6464: SOS cannot make use of ECAM---------------
Generally, SOS will check the MMIO Base Addr in ACPI MCFG
table to confirm it is a reserved memory area. There will
be 3 methods to check:
1. Via E820 table
2. Via EFI runtime service
3. To check with the value in PCIEXBAR(0x60) of hostbridge

For SOS, method 2 is not feasible since no EFI runtime service
is available for SOS. And on newer platform like EHL/TGL, its
BIOS somehow doesn't reserve it in native E820, thus SOS will
try use method 3 to verify, so we should inject physical ECAM
to vhostbridge, otherwise all 3 methods will fail, and SOS will
not make use of ECAM, which will results in that SOS cannot use
PCIe Extended Capabilities like SR-IOV.
-------------------------------------------------------

TODO:
1. In the future, we may add one or more virtual hostbridges for CPUs that are incompatible in layout with the current one, according to HW specs
2. Besides PCIEXBAR(0x60), there are also some registers needs to be emulated more precisely rather than be treated as read-only and hard-coded, will be fixed in future patches.

Tracked-On: #5056
Signed-off-by: Qian Wang <qian1.wang@intel.com>
Reviewed-by: Jason Chen <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-07-23 20:20:13 +08:00
Qian Wang ff10c25ae9 HV: refine init_vhostbridge to be dword-aligned
hv: vpci: refine init_vhostbridge to be dword-aligned

Refine the hard-coded non-dword-aligned sentences in init_vhostbridge
to be dword-aligned to simplify the initialization operation

Tracked-On: #5056
Signed-off-by: Qian Wang <qian1.wang@intel.com>
Reviewed-by: Jason Chen <jason.cj.chen@intel.com>
Reviewed-by: Li Fei <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-07-23 20:20:13 +08:00
Li Fei1 27c6f1c007 hv: vpci: remove vpci->vm not equal to null pre-condition
In commit 0a7770cb, we remove vm pointer in vpci structrue. So there's no need
for such pre-condition since vpci is embedded in vm structure. The vm can't be
NULL Once the vpci is not NULL.

Tracked-On: #4550
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong<eddie.dong@Intel.com>
2020-05-13 14:31:01 +08:00
Li Fei1 af8329394b hv: vpci: minor refine the vdev ownership data structure
Add a new field 'parent_user' to record the parent user of the vdev.  And refine
'new_owner' to 'user' to record who is the current user of the vdev. Like

-----------------------------------------------------------------------------------------------
vdev in    |   HV       |   pre-VM       |               SOS                   | post-VM
           |            |                |vdev used by SOS|vdev used by post-VM|
-----------------------------------------------------------------------------------------------
parent_user| NULL(HV)   |   NULL(HV)     |   NULL(HV)     |   NULL(HV)         | vdev in SOS
-----------------------------------------------------------------------------------------------
user       | vdev in HV | vdev in pre-VM |   vdev in SOS  |   vdev in post-VM  | vdev in post-VM
-----------------------------------------------------------------------------------------------

Tracked-On: #4550
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong<eddie.dong@Intel.com>
2020-05-13 14:31:01 +08:00
Li Fei1 41350c533c hv: vpci: add _v prefix for some function name
Add _v prefix for some function name to indicate this function wants to operate
on virtual CFG space or virtual BAR register.

Tracked-On: #4371
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-03-09 17:09:55 +08:00
Yuan Liu 60a7c49bb0 hv: Refine code for API reduction
Removed the pci_vdev_write_cfg_u8/u16/u32 APIs and only used
pci_vdev_write_cfg as the API for writing vdev's cfgdata

Tracked-On: #4433

Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-03-09 12:56:00 +08:00
Yuan Liu e1ca1ae2e9 hv: refine functions name
Make the name of the functions more accurate

Tracked-On: #4433

Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-03-05 22:21:21 +08:00
Mingqiang Chi de0a5a48d6 hv:remove some unnecessary includes
--remove unnecessary includes
--remove unnecssary forward-declaration for 'struct vhm_request'

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-10-15 14:40:39 +08:00
Li, Fei1 4c8e60f1d0 hv: vpci: add each vdev_ops for each emulated PCI device
Add a field (vdev_ops) in struct acrn_vm_pci_dev_config to configure a PCI CFG
operation for an emulated PCI device. Use pci_pt_dev_ops for PCI_DEV_TYPE_PTDEV
by default if there's no such configure.

Tracked-On: #3475
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-08-09 14:19:49 +08:00
Yin Fengwei ce4d71e038 vpci: fix coding style issue
This is a followup patch to fix the coding style issue introduced
in by commit "c2d25aafb889ade954af8795df2405a94024d860":
  The unmodified pointer should be defined as const

Also addressed one comments from Fei to use reversed function call
in vpci_init_pt_dev and vpci_deinit_pt_dev.

Tracked-On: #3241
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-07-22 16:21:40 +08:00
Yin Fengwei 009a16bd7d vhostbridge: update vhostbridge to use vdev_ops
And use vhostbridge for both SOS and pre-launched VM.

Tracked-On: #3241
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-07-15 10:35:47 +08:00
dongshen f7c4d2b5c4 HV: add uint32_t nr_bars to struct pci_vdev
Use nr_bars instead of PCI_BAR_COUNT to check bar access offset.
As while normal pci device has max 6 bars, pci bridge only has 2 bars,
so for pci normal pci device, pci cfg offsets 0x10-0x24 are for bar access,
but for pci bridge, only 0x10-0x14 are for bar access (0x18-0x24 are
for other accesses).

Rename function:
 pci_bar_access --> is_bar_offset

Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-06-27 15:35:16 +08:00
dongshen b957802164 HV: unify the sharing_mode_cfgwrite and partition_mode_cfgwrite code
Put the cfgwrite code in write_cfg() for both sos and pre-launched VMs, and
remove sharing_mode_cfgwrite() and partition_mode_cfgwrite().

Rename functions used by write_cfg():
 vhostbridge_cfgwrite --> vhostbridge_write_cfg
 vdev_pt_cfgwrite --> vdev_pt_write_cfg
 vmsi_cfgwrite --> vmsi_write_cfg
 vmsix_cfgwrite --> vmsix_write_cfg

Fix @pre for functions

Tracked-On: #3056
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
2019-05-20 10:37:13 +08:00
dongshen 7635a68f38 HV: unify the sharing_mode_cfgread and partition_mode_cfgread code
Put the cfgread code in read_cfg() for both sos and pre-launched VMs, and
remove sharing_mode_cfgread() and partition_mode_cfgread().

Rename functions used by read_cfg():
 vhostbridge_cfgread --> vhostbridge_read_cfg
 vdev_pt_cfgread --> vdev_pt_read_cfg
 vmsi_cfgread --> vmsi_read_cfg
 vmsix_cfgread --> vmsix_read_cfg

Tracked-On: #3056
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
2019-05-20 10:37:13 +08:00
dongshen 19af3bc8aa HV: unify the sharing_mode_vpci_deinit and partition_mode_vpci_deinit code
Put the deinit code in deinit_prelaunched_vm_vpci() for both sos and pre-launched VMs, and
remove sharing_mode_vpci_deinit() and partition_mode_vpci_deinit().

Rename functions used by deinit():
 vhostbridge_deinit --> deinit_vhostbridge
 vmsi_deinit --> deinit_vmsi
 vmsix_deinit --> deinit_vmsix
 post_launched_vm_vpci_deinit --> deinit_post_launched_vm

Tracked-On: #3056
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-05-20 10:37:13 +08:00
dongshen 3a6c63f2d8 HV: unify the sharing_mode_vpci_init and partition_mode_vpci_init code
Put the init code in init_vdev_for_pdev for both sos and pre-launched VMs, and
remove sharing_mode_vpci_init() and partition_mode_vpci_init().

Rename functions used by init_vdev_for_pdev:
 vhostbridge_init --> init_vhostbridge
 vmsi_init --> init_vmsi
 vmsix_init --> init_vmsix

Tracked-On: #3056
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-05-20 10:37:13 +08:00
dongshen cf48b9c38f HV: use is_prelaunched_vm/is_hostbridge to check if the code is only for pre-launched VMs
Currently host bridge emulation and bar emulation are only for pre-launched vms,
use is_prelaunched_vm to check if it is for pre-launched vms when calling
init/deinit/cfgread/cfgwrite, also use is_hostbridge() to check if the access if
for host bridge, so that these functions can be unified for sos and pre-launched
vm in subsequent commits.

Move is_hostbridge function to vpci_priv.h so that it can be used by multiple
files.

vhostbridge_cfgread/vhostbridge_cfgwrite: return -ENODEV if the pci cfg access is not
targeted for vhostbridge so that cfgread/cfgwrite functions can be unified for sos and
pre-launched vm in subsequent commits

Fix @pre for functions

Tracked-On: #3056
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-05-20 10:37:13 +08:00
dongshen 4e2d13bda7 HV: rename hostbridge related functions
vdev_hostbridge_init --> vhostbridge_init
vdev_hostbridge_cfgread --> vhostbridge_cfgread
vdev_hostbridge_cfgwrite --> vhostbridge_cfgwrite
vdev_hostbridge_deinit --> vhostbridge_deinit

Tracked-On: #3056
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-05-08 10:02:56 +08:00
Mingqiang Chi da9ed0eda9 hv:remove some unnecessary includes
remove some unnecessary includes

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-05-07 09:10:13 +08:00
dongshen 320bf18321 HV: rename pci_priv.h to vpci_priv.h
Rename hypervisor/dm/vpci/{pci_priv.h => vpci_priv.h} and change the related
source code files accordingly

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-25 12:35:39 +08:00
dongshen 1a3c9b3255 HV: rename vpci files
Renamed 3 files:
hypervisor/dm/vpci/hostbridge.c => vhostbridge.c}
hypervisor/dm/vpci/{msi.c => vmsi.c}
hypervisor/dm/vpci/{msix.c => vmsix.c}

And change Makefile accordingly

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-25 12:35:39 +08:00