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HV: refine init_vhostbridge to be dword-aligned 

hv: vpci: refine init_vhostbridge to be dword-aligned

Refine the hard-coded non-dword-aligned sentences in init_vhostbridge
to be dword-aligned to simplify the initialization operation

Tracked-On: #5056
Signed-off-by: Qian Wang <qian1.wang@intel.com>
Reviewed-by: Jason Chen <jason.cj.chen@intel.com>
Reviewed-by: Li Fei <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Qian Wang 2020-07-20 17:37:20 +08:00 committed by wenlingz
parent 112f02851c
commit ff10c25ae9
1 changed files with 14 additions and 31 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

45
hypervisor/dm/vpci/vhostbridge.c
View File

@ -48,43 +48,26 @@ static void init_vhostbridge(struct pci_vdev *vdev)
/* PCI config space */
pci_vdev_write_vcfg(vdev, PCIR_VENDOR, 2U, 0x8086U);
pci_vdev_write_vcfg(vdev, PCIR_DEVICE, 2U, 0x5af0U);
pci_vdev_write_vcfg(vdev, PCIR_REVID, 1U, 0xbU);
pci_vdev_write_vcfg(vdev, PCIR_HDRTYPE, 1U, (PCIM_HDRTYPE_NORMAL | PCIM_MFDEV));
pci_vdev_write_vcfg(vdev, PCIR_CLASS, 1U, PCIC_BRIDGE);
pci_vdev_write_vcfg(vdev, PCIR_SUBCLASS, 1U, PCIS_BRIDGE_HOST);
pci_vdev_write_vcfg(vdev, 0x34U, 1U, 0xe0U);
pci_vdev_write_vcfg(vdev, 0x3cU, 1U, 0xe0U);
pci_vdev_write_vcfg(vdev, 0x48U, 1U, 0x1U);
pci_vdev_write_vcfg(vdev, 0x4aU, 1U, 0xd1U);
pci_vdev_write_vcfg(vdev, 0x4bU, 1U, 0xfeU);
pci_vdev_write_vcfg(vdev, 0x50U, 1U, 0xc1U);
pci_vdev_write_vcfg(vdev, 0x51U, 1U, 0x2U);
pci_vdev_write_vcfg(vdev, 0x54U, 1U, 0x33U);
pci_vdev_write_vcfg(vdev, 0x58U, 1U, 0x7U);
pci_vdev_write_vcfg(vdev, 0x5aU, 1U, 0xf0U);
pci_vdev_write_vcfg(vdev, 0x5bU, 1U, 0x7fU);
pci_vdev_write_vcfg(vdev, 0x60U, 1U, 0x1U);
pci_vdev_write_vcfg(vdev, 0x63U, 1U, 0xe0U);
pci_vdev_write_vcfg(vdev, 0xabU, 1U, 0x80U);
pci_vdev_write_vcfg(vdev, 0xacU, 1U, 0x2U);
pci_vdev_write_vcfg(vdev, 0xb0U, 1U, 0x1U);
pci_vdev_write_vcfg(vdev, 0xb3U, 1U, 0x7cU);
pci_vdev_write_vcfg(vdev, 0xb4U, 1U, 0x1U);
pci_vdev_write_vcfg(vdev, 0xb6U, 1U, 0x80U);
pci_vdev_write_vcfg(vdev, 0xb7U, 1U, 0x7bU);
pci_vdev_write_vcfg(vdev, 0xb8U, 1U, 0x1U);
pci_vdev_write_vcfg(vdev, 0xbbU, 1U, 0x7bU);
pci_vdev_write_vcfg(vdev, 0xbcU, 1U, 0x1U);
pci_vdev_write_vcfg(vdev, 0xbfU, 1U, 0x80U);
pci_vdev_write_vcfg(vdev, 0xe0U, 1U, 0x9U);
pci_vdev_write_vcfg(vdev, 0xe2U, 1U, 0xcU);
pci_vdev_write_vcfg(vdev, 0xe3U, 1U, 0x1U);
pci_vdev_write_vcfg(vdev, 0xf5U, 1U, 0xfU);
pci_vdev_write_vcfg(vdev, 0xf6U, 1U, 0x1cU);
pci_vdev_write_vcfg(vdev, 0xf7U, 1U, 0x1U);
pci_vdev_write_vcfg(vdev, 0x48U, 4U, 0xfed10001U);
pci_vdev_write_vcfg(vdev, 0x50U, 4U, 0x000002c1U);
pci_vdev_write_vcfg(vdev, 0x54U, 4U, 0x00000033U);
pci_vdev_write_vcfg(vdev, 0x58U, 4U, 0x7ff00007U);
pci_vdev_write_vcfg(vdev, 0x60U, 4U, 0xe0000001U);
pci_vdev_write_vcfg(vdev, 0xa8U, 4U, 0x80000000U);
pci_vdev_write_vcfg(vdev, 0xacU, 4U, 0x00000002U);
pci_vdev_write_vcfg(vdev, 0xb0U, 4U, 0x7c000001U);
pci_vdev_write_vcfg(vdev, 0xb4U, 4U, 0x7b800001U);
pci_vdev_write_vcfg(vdev, 0xb8U, 4U, 0x7b000001U);
pci_vdev_write_vcfg(vdev, 0xbcU, 4U, 0x80000001U);
pci_vdev_write_vcfg(vdev, 0xe0U, 4U, 0x010c0009U);
pci_vdev_write_vcfg(vdev, 0xf4U, 4U, 0x011c0f00U);
vdev->parent_user = NULL;
vdev->user = vdev;