Originally, we don't format the output of analyser well. It is hard to read the
result.
This patch make every entry of the result align with the corresponding title to
make it easier for users to read.
Without patch:
Event NR_Exit NR_Exit/Sec Time Consumed(cycles) Time Percentage
VMEXIT_INTERRUPT_WINDOW 78090 130.15 40 0.01
VMEXIT_CR_ACCESS 0 0.00 0 0.00
VMEXIT_APICV_ACCESS 0 0.00 0 0.00
VMEXIT_EXCEPTION_OR_NMI 0 0.00 0 0.00
VMEXIT_RDTSC 0 0.00 0 0.00
...
Vector Count NR_Exit/Sec
0x000000f0 82337 137.23
0x000000ef 247713 412.85
With patch:
Event NR_Exit NR_Exit/Sec Time Consumed(cycles) Time percentage
VMEXIT_APICV_WRITE 13352 22.25 14331304 0.00
VMEXIT_WRMSR 309085 515.14 241166212 0.02
VMEXIT_INTERRUPT_WINDOW 78090 130.15 76841734 0.01
...
Vector Count NR_Exit/Sec
0x000000f0 82337 137.23
0x000000ef 247713 412.85
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Yan, Like <like.yan@intel.com>
This commit cleans up the irq APIs which are a bit confusing.
- pri_register_handler(), normal_register_handler() and
common_register_handler() into request_irq(), and removed
the unnecessary struct irq_request_info;
- rename the unregister_common_handler() to free_irq();
After the revision, the common irq APIs becomes:
- int32_t request_irq(uint32_t irq,
irq_action_t action_fn,
void *action_data,
const char *name)
- void free_irq(uint32_t irq)
Signed-off-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Since vector is x86 specific concept, we'd like to hide it from common irq APIs.
This commit
- adds static irq:vector mappings for special interrupt such as timer
and cpu notification;
- reserves the irq and vector at initialization;
- removed the vector argument in pri_register_handler(), get reserved vector
from irq_desc in common_register_handler().
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Since we don't support shared irq, dev_handler_node which works as action node,
is not needed anymore.
This commit removes the dev_handler_node struct and does some relevant changes,
including:
- moves necessary fields to struct irq_desc: action, priv_data, name; and
removes unused handler_data;
- changes return type of pri_/normal_register_handler() from dev_handler_node*
to int32_t, which is irq num (>= 0) on success, and errno (> 0) on failure.
- changes unregister_irq_handler() to take argument unint32_t instead of
dev_handler_node*;
- changes are made to the places where these APIs are called.
Signed-off-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Because multiple physical devices sharing a single physical pin would be
assigned to a same VM, so UOS could handle the irq sharing. So that we could
remove the physical irq sharing support in HV.
This commit removes the irq sharing support, changes including:
- removed the dev_list field in irq_desc, and clean up codes for the list
operation;
- replace IRQ_ASSIGNED_SHARED and IRQ_ASSIGNED_NOSHARE with IRQ_ASSIGNED;
- remove argument indicating irq is shared;
- revise irq request flow for pt devices to remove dependency on irq sharing:
register irq on adding remapping entery and unregister irq on removal an
entry, and do not register/unregister at remapping an entry.
Signed-off-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
MISRA-C requires that shift operation cannot exceed the word length.
What this patch does:
- Add the pre condition for 'init_lapic' regarding to 'pcpu_id'
Currently, max 8 physical cpus are supported.
Re-design will be required if we would like to support more physical
cpus.
So, add the pre condition here to avoid the unintentional shift
operation mistakes.
- Replace the id type with uint8_t in 'vlapic_build_id'
- For VM0, it uses 'lapic_id' as its id, which is uint8_t.
- For non VM0, it uses 'vcpu_id' as its id, which is uint16_t.
Cast this id to uint8_t to make sure there is no loss of data after
left shifting 24U.
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Add two files to do compile time assert.
One is arch specific, and put in hypervisor/arch/x86/.
The other one is common, and put in hypervisor/common/.
If the statement is not true, there will be error during compile time.
The file will not increase the size of HV binary.
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Move the definitions of offset of fields in boot_ctx to the same header
file that the struct boot_ctx is in, to reduce the possibility that some
modification would make the offset inconsistant with the fields within
the structure.
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Sometimes the CPUID(0x15) still returns the zero tsc frequency. In such case
the base frequency of cpuid(0x16) is used as tsc frequency.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
The CPUID with 0x16 leaf can report the CPU hz and it is faster. And this
mechanism is widely used in Linux kernel.(native_calibrate_cpu).
As this is not supported on APL, currently sos adds the cpu_khz callback
in pv_cpu_ops to read the cpu frequency. This is quite hack.
(In fact HV leverages the cpuid with 0x40000010 leaf).
If it is emulated, the sos and guest os can use the cpuid to obtain the
corresponding cpu_khz. Then the cpu_khz in pv_cpu_ops can be removed.
V2: Simple the logic of adding unsupported cpuid level entry after the
CPUID 0x16 is emulated. Initialize the vcpuid_entry explicitly with zero
for the unsupported cpuid.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
In order to add the emulation of CPUID 0x16, it is expected that it is
handled when the CPUID 0x15 is supported. Otherwise we will have to emulate
other CPUID leaf, which makes it complex.
At the same time as Acrn HV has the requirements on the CPUs, it is restricted
that the CPUID should support the leaf >=0x15.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This patch add "[-t interval] [-h]" which support by acrnlog now to usage.
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Like Yan <like.yan@intel.com>
Option "-r" has been removed by commit 3d6ff0e (tools: acrntrace: save trace
data file under current dir by default). But leaves something unused in optstring
and README.rst.
This patch remove thest related things.
BTW, this patch refine the usage output to print [-t max_time].
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Reviewed-by: Like Yan <like.yan@intel.com>
- clear run context when reset vcpu;
- destroy trusty without erase trusty memory when reset vm;
changelog:
v1 -> v2: fix misra violation on calling memset();
Signed-off-by: Sun Victor <victor.sun@intel.com>
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Reviewed-by: Chi Mingqiang <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
- 'reboot.c' defines 'warm_reboot()' only, and this
function is deprecated.
- remove the eXecution attribute of 'mttr.h'
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
- move local functions declarations to shell.c
- remove 'name' field in 'struct shell' as i/o
session s/w layer is deprecated.
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
The bracket is required when the level of precedence of
the operators is less than 13. Add the bracket to logical
conjunctions. The commit applys the rule to the files under
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
The bracket is required when the level of precedence of
the operators is less than 13. Add the bracket to logical
conjunctions. The commit applys the rule to the files under
hypervisor/arch/x86/guest/*
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
This device model is to configure the virtual IPU PCI device.
In order to execute this DM the lauch script needs to add
virtio-ipu as parameter to acrn-dm
For e.g. -s 21,virtio-ipu
Signed-off-by: Bandi,Kushal <kushal.bandi@intel.com>
with original script, user can not get 3 CPU cores info with cat/proc/cpuinfo in UOS.
it just show 1 only. with this patch, default, user can see 1 cpu info in SOS and 3 cores info in UOS.
and remove 2M hugepages settings because it is not using any more.
# make sure there is enough 2M hugepages in the pool
echo 1024 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages
also, this patch is setting default UOS memory to 2G
remove 2M hugepages setting here because it will not use any more.
# make sure there is enough 2M hugepages in the pool
echo 1024 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages
to avoid send IPI to self, also improve the related code:
1. get_cpu_id is uint16_t now
2. MISRA-C requirement. like add {}
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
1) This patch creates static E820 entries for VMs launced by ACRN in
partition mode.
2) Moves vm_description entries from bsp/sbl/ to partition/
3) Removes unused API get_vm_desc_base
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Current EPT check runs after EPT enabling in init_exec_ctrl. This
patch fixes wrong order.
Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
ACRN in partition mode emulates UART for the VMs directly launced
from HV. This patch adds an option to enable/disable vUART for a
VM.
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
For Partition mode ACRN, kernel load address and Boot args load address
are hardcoded. Boot args are currently passed from vm description for
each VM. Renamed init_vm0_boot_info to init_vm_boot_info.
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Use func(void) rather than func() for the function declaration and
definition based on MISRAC requirement.
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Randomness sourced from /dev/random which does not block
once it has been seeded at bootup and you will always get
something when you read from that file. This is true on
Freebsd but unfortunately things are not the same on Linux.
Most cases, you can't read anything from /dev/random especially
on current acrn platform which lacking random events.
virtio_rnd inherted from freebsd doesn't work anymore.
This patch makes virtio_rnd working on Linux based SOS. It uses
blocking IO to sevice the front-end random driver and delays the
read operation into a new thread to avoid blocking the main
notify thread.
Signed-off-by: Jie Deng <jie.deng@intel.com>
Reviewed-by: Shuo Liu <shuo.a.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
MISRAC requires that a switch statement shall contain a default clause.
This patch add the default clause and some comments for the ones
violated the rule.
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
misc now has a new home: https://github.com/intel/ioc-cbc-tools.
The "Execstop" patch will be synced to new git tree soon.
ioc-cbc-tools was just added to Clear Linux, and will be added to
software-defined-cockpit bundle after this patch merged.
Merging this patch may cause some IOC releated feature block until we
get a new Clear Linux release. This is the switch window ...
Signed-off-by: Alek Du <alek.du@intel.com>
1. support "writeback" and "writethru" mode toggling for virtio-blk
conditionally. When starting DM with "writethru" parameter in
virtio-blk, guest OS could not toggle cache mode. When starting DM
with "writeback" parameter in virtio-blk, guest OS could toggle
cache mode.
------------------------------
DM cmdline | toggle support
------------+-----------------
writeback | yes
writethru | no
------------------------------
2. To toggle cache mode, run below command in guest OS:
echo "write back" > /sys/devices/xxx/vdx/cache_type
OR
echo "write through" > /sys/devices/xxx/vdx/cache_type
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Reviewed-by: Shuo Liu <shuo.a.liu@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
currently, each virtio device has their own virtio_ops implementation.
Take virtio-blk for example:
static struct virtio_ops virtio_blk_ops = {
"virtio_blk",
1,
sizeof(struct virtio_blk_config),
virtio_blk_reset,
virtio_blk_notify,
virtio_blk_cfgread,
virtio_blk_cfgwrite,
NULL,
NULL,
VIRTIO_BLK_S_HOSTCAPS,
};
If start DM with two virtio-blk, this global variable will be
assigined to two virtio-blk instances. Changing hv_caps for one
instance will affect others. But different instances may need
different capabilities.
To support this requirement, we suggest to move hv_caps to
virtio_base structure, and each instance can return their own
capabilities.
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
Add parameters introduction for virtio-blk
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Reviewed-by: Shuo Liu <shuo.a.liu@intel.com>
Reviewed-by: David B. Kinder <david.b.kinder@intel.com>
In writethru mode, guest storage write are reported completed only
when the data has been written to physical storage.
In writeback mode, guest storage write are reported completed when
data is placed in SOS page cache. Needs to be flushed to the
physical storage.
USAGE:
-s x,virtio-blk,<filepath>,writeback
-s x,virtio-blk,<filepath>,writethru
The default mode is *writethru*
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Reviewed-by: Shuo Liu <shuo.a.liu@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
There is no SOS and device model in strict partition mode. ACRN emulates IO for
virtual devices. Any access to IO not backed by HV should return all FFs on read
and writes should be discarded.
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
ACRN boots multiple OS in partitioning mode. This patch adds code to assign
vm_id in the vm data structure to be same as the one assigned at compile time.
This makes the vm id deterministic for each VM booted from HV directly.
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
ACRN in partition mode does not have vector and APIC ID remapping for
device interrupts. Only MSIs are supported. No IOAPIC and legacy interrupts
for the VMs in ACRN partition mode.
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
This patch is an extension to the commit 6643adff8b.
It uses the mptable API to build mptable for each VM booted by ACRN in partition mode.
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Adding code to map memory for UOS in partitioning mode ACRN.
HPA starting above 4GB is used for UOS memory. Supports only contiguous memory
from host for UOS. Current implementation supports only 2 GB for UOS memory.
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
It's not necessary to specify priority for dynamic allocated vector, because
nested irq is not supported on HV, and irq of any priority would cause VM exit.
This commit makes the following changes:
- remove the argument indicating priority in struct irq_request_info and
following functions:
ptdev_activate_entry()
find_available_vector()
irq_desc_alloc_vector()
normal_register_handler()
- change the macro of vector ranges:
VECTOR_DYNAMIC_START/END for dynamically allocable vectors;
VECTOR_FIXED_START/END for fixed allocated vectors, such as vector for
timer etc.
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
-- add clear trusty memory flag
In some cases such as UOS power off or UOS full reset,
need to clear trusty memory,no need to clear memory such as
UOS S3 or UOS system reset,then add a flag to distinguish it
when destroy secure world.
-- Restore trusty memory to guest normal world.
-- Moved free trusty EPT inside destroy_secure_world
In some cases such as UOS S3 or UOS system reset,
only need to free trusty EPT, this patch move free
trusty EPT inside destroy_secure_world.
Because PD/PT are shared in both secure world's EPT
and normal world's EPT,before freeing trusty EPT,
it will memset all PDPTEs except trusty memory,
then call 'free_ept_mem', it can only free trusty EPT,
and does't affect shared normal world EPT.
v2-->v3:
-- Used new mmu api ept_mr_add when restore trusty memory
to SOS and normal world
-- Dropped this patch "Removed reverted page tables for trusty memory"
because map_mem will be removed in future
It will have a patch, need to update this api(ept_mr_add),
it will not create inverted page tables for trusty memory.
v1-->v2:
-- free trusty ept
still use free_ept_mem, not add a new api,but need to
memset pdptes except trusty memory
-- Removed reverted page tables for trusty memory.
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
MISRAC does not allow the use of an inline function with external
linkage.
What this patch does:
- Add the static keyword for the function that is only used in the
definition file.
- Remove the inline keyword for the function that is used in multiple
files.
v1 -> v2:
* Move some functions to headers as static inline function if it is
possible
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Declare a variable with the static qualifier if it is of file scope and
not used in another file.
v1 -> v2:
* remove the unnecessary change to the following variables, which is
due to the report issue
struct multiboot_info *mbi = (struct multiboot_info *)
(HPA2HVA((uint64_t)boot_regs[1]));
struct multiboot_mmap *mmap =
(struct multiboot_mmap *)
HPA2HVA((uint64_t)mbi->mi_mmap_addr);
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
V4:
- Moved error checking to vdev_hostbridge_cfgwrite/vdev_hostbridge_cfgread
V3:
- Unified ops calling and implemented deinit/cfgwrite/cfgread ops,
previously only init op is implemented
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
V4:
- Renamed members for struct pcibar and changed code accordingly
V3:
- Do not use ASSERT
- Use EPT_XX defines when claling ept_mr_add
- Report 64-bit MMIO physical bar to UOS as 32-bit virtual bar
(assume bar size is always less than 4GB), which removed quite some of
64-bit bar handling code
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Kaige Fu