Commit Graph

6498 Commits

Author SHA1 Message Date
wenlingz f5935afc4f version:2.6
Signed-off-by: wenlingz <wenling.zhang@intel.com>
2021-09-29 13:02:31 +08:00
Junjie Mao c3473b589c config_tools: schema: revert to old schema
Commit e678dc8 ("doc: pick doc updates for v2.6 release") picked the latest
scenario XML schema from the main branch, which includes both documentation
changes and new configuration entries. These new entries cause build
failures of the release branch because those new entries do not exist in
the scenario XMLs of v2.6 and the default value populator is yet to be
added for v2.7.

This patch removes those new entries to unblock the build.

Tracked-On: #5692
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-09-29 13:09:24 +08:00
David B. Kinder e678dc8e7a doc: pick doc updates for v2.6 release
Tracked-On: #5692

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2021-09-28 13:21:50 -07:00
Junjie Mao eade39758a Makefile: fix wrong reference to board XML and skip binary in diffconfig
The current config.mk uses the variable BOARD_FILE as the path to the board
XML when generating an unmodified copy of configuration files for
comparison, which is incorrect. The right variable is HV_BOARD_XML which is
the path to the copy of board XML that is actually used for the build.

This patch corrects the bug above.

In addition, this patch also skips binary files (which are not meant to be
edited manually) when calculating the differences.

Tracked-On: #6592
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-09-19 20:23:22 +08:00
Fei Li 9bf80f916e dm: pci: destory reseverd PIO BAR when deinit passthrough PCI device
Destory reseverd PIO BAR when deinit passthrough PCI device to free
reserved_bar_regions.

Tracked-On: #6508
Signed-off-by: Fei Li <fei1.li@intel.com>
2021-09-13 18:20:03 +08:00
Fei Li f83d782255 hv: pci: fix a minor bug about is_pci_cfg_multifunction
Before checking whether a PCI device is a Multi-Function Device or not, we need
make sure this PCI device is a valid PCI device. For a valid PCI device, the
'Header Layout' field in Header Type Register must be 000 0000b (Type 0 PCI device)
or 000 0001b (Type 1 PCI device).

So for a valid PCI device, the Header Type can't be 0xff.

Tracked-On: #4134
Signed-off-by: Fei Li <fei1.li@intel.com>
2021-09-13 13:47:36 +08:00
Fei Li 1c61872ef7 dm: pci: minor bug fix about uninitialized local variable
'error' might be used uninitialized in cfginitbar. So initialize it to zero
at the beginning.

Tracked-On: #6284
Signed-off-by: Fei Li <fei1.li@intel.com>
2021-09-13 13:47:36 +08:00
Geoffroy Van Cutsem 0b63f3378d Makefile: add missing deps in top-level and hypervisor Makefile
Add a couple of missing dependencies in the ACRN Makefiles:
1. 'acrn.bin' is required before the hypervisor can be installed
2. The 'acrn_mngr.h' needs to be installed ('tools-install') in
the build folder.

Tracked-On: #6360
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2021-09-13 13:36:47 +08:00
Liu Long 77f9d871af ACRN:DM Release resource when destroy the device
When destroy the usb device release the resource allocate for transfer
in case cause the memory leak issue. Add the release and cancel
transfer request call back for the emulation device, use the emulation
device call back in xHCI controller emulation.

Tracked-On: #6533
Signed-off-by: Liu Long <long.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-09-08 10:02:13 +08:00
Fei Li 243227e452 hv: mmiodev: a minor bug fix about refine acrn_mmiodev data structure
Rename base_hpa to host_pa in acrn_mmiodev data structure.

Tracked-On: #6366
Signed-off-by: Fei Li <fei1.li@intel.com>
2021-09-06 10:24:42 +08:00
Kunhui-Li 90452146ff config_tools: support SRIOV based GPU sharing in launch script
We will use SRIOV based GPU sharing to replace default GVT-d config
on adl-s-crb platform. So add the logic of passthru gpu VF,
If the string "sriov" is found in launch xml, we will hardcode
different value to gpu VF and set different parameter for WaaG and
LaaG in launch script.

The relevant line in the generated launch script will look like this:
Laag: "-s 2,passthru,0/2/1,gpu  \"
WaaG: "-s 2,passthru,0/2/2,igd-vf  \"

Tracked-On: #6290
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
2021-09-06 10:22:36 +08:00
Kunhui-Li 6d9493ae69 config_tools: update scenario xml file on ehl-crb-b platform
for ehl-crb-b platform, update sos rootfs from "dev/sda3"
to "/dev/nvme0n1p3" in hybrid.xml file.

Tracked-On: #6530
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
2021-09-02 09:17:53 +08:00
Yifan Liu 7d170c35e3 hv: minor change to SMBIOS version check
On some UEFI platforms, it is found that SMBIOS major version 3 can be
found under SMBIOS2 GUID, so using major version to distinguish
different version of SMBIOS is not reliable. This patch removes the use
of smbios_info.major_ver, and checks the anchor string instead.

Tracked-On: #6528
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
2021-09-01 16:39:26 +08:00
Liu,Junming 041a7dec98 hv: refine the VMCS io bitmap handling when pass-thru PIO bar
In current design, when pass-thru dev,
for the PIO bar, need to ensure the guest PIO start address
equals to host PIO start address.
Then set the VMCS io bitmap to pass-thru the corresponding
port io to guest for performance.

But malicious guest may reprogram the PIO bar,
then hv will pass-thru the reprogramed PIO address to guest.
This isn't safe behavior.

Here only pass-thru the host physical device PIO to guest.
If guest regrogram the PIO bar, just update the virtual bar only.
Currently, we don't support PIO bar reprogramming,
if guest reprogram the PIO bar, guest should take responsibility itself

When init the pass-thru dev PIO bars, set the VMCS io bitmap.
setup_io_bitmap is called before init pass-thru dev to
initiailize the io bitmap, so don't need to
call deny_guest_pio_access when deinit pass-thru dev.

v1 -> v2:
	* set the VMCS io bitmap when init pass-thru devices
	to migrate redoing allow_guest_pio_access()/deny_guest_pio_access().

Tracked-On: #6508

Signed-off-by: Liu,Junming <junming.liu@intel.com>
2021-09-01 15:31:55 +08:00
Fei Li cf345269d9 dm: identical mapping of pass-thru dev PIO bar
For pass-thru dev PIO bar,keep identical mapping

Tracked-On: #6508

Signed-off-by: Fei Li <fei1.li@intel.com>
2021-09-01 15:31:55 +08:00
Kunhui-Li a075129534 config_tools: update scenario xml files on tgl-rvp platform
For SMBIOS and TPM, enable SECURITY_VM_FIXUP and add GUEST_FLAG_SECURITY_VM
flag in TGL hybrid_rt.xml. Then disable SECURITY_VM_FIXUP in TGL hybrid.xml
because it’s previously enabled in hybrid.xml instead of hybrid_rt.xml by
mistake.

Tracked-On: #6320
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
2021-08-31 13:38:37 +08:00
Yonghua Huang b897fe3933 dm: fix potential program crash issue in disk_logger
detection of any error in 'probe_disk_log_file()'
  calling 'pr_err()' will cause 'write_to_disk()' function
  being called recursively infinitely, as pr_err will
  call write_to_disk() and trap to probe_disk_log_file() again,
  hence program will crash finally.

  This patch fix above issue by using printf instead of pr_err,
  as printf outputs to console directly.

Tracked-On: #6518
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2021-08-31 08:59:30 +08:00
Yonghua Huang 66608b38dd DM: fix issue when pass-thru native RTCT SSRAM entries
Native SSRAM entries with only one LAPIC ID of
  value 0 in local APIC ID table can't be pass-thru
  to guest. Such kind of SSRAM entries are for cache
  regions that are global shared and shall be visible
  to guests.

  This patch refine the building logic of vRTCT to fix
  above issue.

Tracked-On: #6510
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2021-08-30 08:46:44 +08:00
Yifan Liu e51837f96d hv: Add check to ensure vcpu_make_request and signal_event are
consistent

Currently the vcpu_make_request and signal_event in vcpu_lock_instr_emulation
does not check whether target VCPU is up and running. This can cause
problems because when VCPU is created but not launched,
vcpu_make_request will not trigger wait_event on target VCPU, but
signal_event may still execute to reduce the counter.

This patch adds a check before vcpu_make_request and signal_event to
make sure the request and signal are issued after target VCPU is up.

Tracked-On: #6502
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
2021-08-27 16:16:52 +08:00
Zhou, Wu 25ed86e28f HV: Fix the problem of copy fail when booting pre-launched VMs
The length of the ACPI data entry in ve820 tab was 960K, while the
ACPI file is 1MB. It would cause ept unmapped fault when loading the
pre-launched VMs. This patch changes it to 1MB to fix the problem.

And the ACPI data length was missed when calculating
ENTRY_HPA1_LOW_PART2 length. Fixed here too.

The vACPI data and NVS entry size for pre-launched VM is currently
hard-coded. Add VIRT_ACPI_DATA_LEN and VIRT_ACPI_NVS_LEN to replace
them. And build connection with their starting address, too.

Tracked-On: #6507

Signed-off-by: Zhou, Wu <wu.zhou@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
2021-08-27 15:19:55 +08:00
Kunhui-Li 76f384779c config_tools: update the logic of getting gpu bdf
The bdf of gpu is not 00:02.0 for the new platform icx-rvp,
it is 05:00.0 now, so we remove the hardcode 00:02.0;
And change to get the gpu bdf from board.xml.

Tracked-On: #6357
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
2021-08-26 20:08:23 +08:00
Liu Long 9cc090e677 ACRN:DM: Fix the bug introduced by dea2574819.
Fix the bug introduced by dea2574819. There had a typo that added
the "&" by mistake.

Tracked-On: #6476
Signed-off-by: Liu Long <long.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-08-26 13:15:06 +08:00
Yang,Yu-chu 2e2207b00b config-tools: assign a fixed address to log area start address
Allocate the log area start address at fixed gpa 0x7FFB0000.

Tracked-On: #6320
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
2021-08-26 10:01:43 +08:00
Kunhui-Li 3faa2a8706 config_tools: update xml files
1. set the content of the bootargs tag to empty for KERNEL_ELF type
in hybrid xml files.
2. update generic_board.xml with the latest nuc11tnbi5.xml to fix
compile fail issue.

Tracked-On: #6461
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
2021-08-26 08:52:32 +08:00
Kunhui-Li 44942b4cb7 config_tools: update the regex range of online cpu
update the regex range of online cpu from [1-99] to [0-9]
in script to make power on/off RTVM normally.

Tracked-On: #6482
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
2021-08-26 08:51:47 +08:00
Shiqing Gao 51a747d9c8 hv: check the capability of XSAVES/XRSTORS instructions before execution
For platforms that do not support XSAVES/XRSTORS instructions, like QEMU,
executing these instructions causes #UD.
This patch adds the check before the execution of XSAVES/XRSTORS instructions.

It also refines the logic inside rstore_xsave_area for the following reason:
If XSAVES/XRSTORS instructions are supported, restore XSAVE area if any of the
following conditions is met:
 1. "vcpu->launched" is false (state initialization for guest)
 2. "vcpu->arch.xsave_enabled" is true (state restoring for guest)

 * Before vCPU is launched, condition 1 is satisfied.
 * After vCPU is launched, condition 2 is satisfied because
   is_valid_xsave_combination() guarantees that "vcpu->arch.xsave_enabled"
   is consistent with pcpu_has_cap(X86_FEATURE_XSAVES).
Therefore, the check against "vcpu->launched" and "vcpu->arch.xsave_enabled"
can be eliminated here.

Tracked-On: #6481

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2021-08-25 16:30:14 +08:00
Liu Long dea2574819 ACRN:DM: Add pointer check before use the erst
The event ring segment table  pointer may be NULL when get the address
from guest, add pointer check before use it.

Tracked-On: #6476
Signed-off-by: Liu Long <long.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-08-25 10:57:30 +08:00
Yang,Yu-chu f861e7b999 config-tools: Kernel load and entry address accept empty string
Allow the kern_load_addr and kern_entry_addr take empty string.

Tracked-On: #6461
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
2021-08-25 10:39:52 +08:00
Yang,Yu-chu c82c79c8e2 config-tools: refine log area start address allocation
Allocates the log area start address using the same size as native environment.

Tracked-On: #6320
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
2021-08-25 08:55:14 +08:00
Liu Long 2c43415903 ACRN:hv: Fix vcpu_dumpreg command hang issue
In ACRN RT VM if the lapic is passthrough to the guest, the ipi can't
trigger VM_EXIT and the vNMI is just for notification, it can't handle
the smp_call function. Modify vcpu_dumpreg function prompt user switch
to vLAPIC mode for vCPU register dump.

Tracked-On: #6473
Signed-off-by: Liu Long <long.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2021-08-25 08:50:31 +08:00
Jian Jun Chen 6653ffc069 hv: GSI of hcall_set_irqline should be checked against target_vm
GSI of hcall_set_irqline should be checked against target_vm's
total GSI count instead of SOS's total GSI count.

Tracked-On: #6357
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2021-08-25 08:49:03 +08:00
Yifan Liu a7c2739965 hv: quirks: SMBIOS passthrough for prelaunched-VM
This feature is guarded under config CONFIG_SECURITY_VM_FIXUP, which
by default should be disabled.

This patch passthrough native SMBIOS information to prelaunched VM.
SMBIOS table contains a small entry point structure and a table, of which
the entry point structure will be put in 0xf0000-0xfffff region in guest
address space, and the table will be put in the ACPI_NVS region in guest
address space.

v2 -> v3:
uuid_is_equal moved to util.h as inline API
result -> pVendortable, in function efi_search_guid
recalc_checksum -> generate_checksum
efi_search_smbios -> efi_search_smbios_eps
scan_smbios_eps kept (checked with Shiqing)
EFI GUID definition kept

Tracked-On: #6320
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
2021-08-23 14:52:36 +08:00
Yifan Liu 6fb8a20a7e hv: Move uuid_is_equal to util.h
This patch moves uuid_is_equal from vm_config.c to util.h as inline API.

Tracked-On: #6320
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
2021-08-23 14:52:36 +08:00
Yifan Liu f70b9788e9 hv && config-tool: Rename GUEST_FLAG_TPM2_FIXUP
This patch renames the GUEST_FLAG_TPM2_FIXUP to
GUEST_FLAG_SECURITY_VM.

v2 -> v3:
The "FIXUP" suffix is removed.

Tracked-On: #6320
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>

Oops
2021-08-23 14:52:36 +08:00
Kunhui-Li 8b7d3ad492 config_tools: remove the log of sucessfully generating board XML
remove the log "<board>.xml has been generated successfully!" in
board_parser.py, because it only mean that the board xml file have
been created sucessfully here, not the all data have been appended
successfully and pretty formatted.

Tracked-On: #6315
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
2021-08-23 14:50:40 +08:00
Shiqing Gao 4056bb42c6 config_tools: add a new entry MAX_EFI_MMAP_ENTRIES
It is used to specify the maximum number of EFI memmap entries.

On some platforms, like Tiger Lake, the number of EFI memmap entries
becomes 268 when the BIOS settings are changed.
The current value of MAX_EFI_MMAP_ENTRIES (256) defined in hypervisor
is not big enough to cover such cases.

As the number of EFI memmap entries depends on the platforms and the
BIOS settings, this patch introduces a new entry MAX_EFI_MMAP_ENTRIES
in configurations so that it can be adjusted for different cases.

Tracked-On: #6442

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2021-08-20 15:04:37 +08:00
Kunhui-Li 84e975b14d config_tools: fix UI issue of creating new settings
1. as a workaround, comment the code to check MBA_DELAY tag when
creating a new scenario xml setting because of this tag are retrived
from scenario xml files in generic_board folder where it is removed
now.
2. update the template launch xml file names according the recent
update for launch xml files in generic folder.

Tracked-On: #6315
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
2021-08-20 11:04:28 +08:00
Junjie Mao c215229fd5 config_tools: update vTPM2 revision to 4
According to TCG ACPI specification (version 1.2), the current revision of
TPM2 table, which has the optional log area fields, is 4. This patch
updates the revision of vTPM2 accordingly.

Tracked-On: #6288
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-08-20 10:17:41 +08:00
Kunhui-Li bd73ac725e config_tools: fix the issue that fail to generate launch script
fix the issue that fail to generate launch script when to disable
CPU sharing.

Tracked-On: #6428
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
2021-08-19 21:22:30 +08:00
Liu Long 037ba7a5e1 ACRN:DM: Fix the Null pointer error
Function virtio_console_close_all will close all consoles, if the console->nports
value is 1, after the console be destroyed by the mevent teardown function, when
get the nports from the console, there will cause the NULL pointer. Fix the issue.

Tracked-On: #6431
Signed-off-by: Liu Long long.liu@intel.com
Reviewed-by: Jian Jun Chen jian.jun.chen@intel.com
Acked-by: Wang, Yu1 yu1.wang@intel.com
2021-08-19 21:20:11 +08:00
Junjie Mao 855b0ed774 board_inspector: add _CID to vACPI device objects
ACPI device drivers use both _HID and _CID to identify devices they
match. This patch copies _CID objects to vACPI devices so that guest
drivers can recognize the passthrough devices properly.

Tracked-On: #6288
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-08-19 20:02:34 +08:00
Shiqing Gao a0c03030f6 hv: initialize the XSAVE related processor state for guest
If SOS is using kernel 5.4, hypervisor got panic with #GP.

Here is an example on KBL showing how the panic occurs when kernel 5.4 is used:
Notes:
 * Physical MSR_IA32_XSS[bit 8] is 1 when physical CPU boots up.
 * vcpu_get_guest_msr(vcpu, MSR_IA32_XSS)[bit 8] is initialized to 0.

Following thread switches would happen at run time:
1. idle thread -> vcpu thread
   context_switch_in happens and rstore_xsave_area is called.
   At this moment, vcpu->arch.xsave_enabled is false as vcpu is not launched yet
   and init_vmcs is not called yet (where xsave_enabled is set to true).
   Thus, physical MSR_IA32_XSS is not updated with the value of guest MSR_IA32_XSS.

   States at this point:
    * Physical MSR_IA32_XSS[bit 8] is 1.
    * vcpu_get_guest_msr(vcpu, MSR_IA32_XSS)[bit 8] is 0.

2. vcpu thread -> idle thread
   context_switch_out happens and save_xsave_area is called.
   At this moment, vcpu->arch.xsave_enabled is true. Processor state is saved
   to memory with XSAVES instruction. As physical MSR_IA32_XSS[bit 8] is 1,
   ectx->xs_area.xsave_hdr.hdr.xcomp_bv[bit 8] is set to 1 after the execution
   of XSAVES instruction.

   States at this point:
    * Physical MSR_IA32_XSS[bit 8] is 1.
    * vcpu_get_guest_msr(vcpu, MSR_IA32_XSS)[bit 8] is 0.
    * ectx->xs_area.xsave_hdr.hdr.xcomp_bv[bit 8] is 1.

3. idle thread -> vcpu thread
   context_switch_in happens and rstore_xsave_area is called.
   At this moment, vcpu->arch.xsave_enabled is true. Physical MSR_IA32_XSS is
   updated with the value of guest MSR_IA32_XSS, which is 0.

   States at this point:
    * Physical MSR_IA32_XSS[bit 8] is 0.
    * vcpu_get_guest_msr(vcpu, MSR_IA32_XSS)[bit 8] is 0.
    * ectx->xs_area.xsave_hdr.hdr.xcomp_bv[bit 8] is 1.

   Processor state is restored from memory with XRSTORS instruction afterwards.
   According to SDM Vol1 13.12 OPERATION OF XRSTORS, a #GP occurs if XCOMP_BV
   sets a bit in the range 62:0 that is not set in XCR0 | IA32_XSS.
   So, #GP occurs once XRSTORS instruction is executed.

Such issue does not happen with kernel 5.10. Because kernel 5.10 writes to
MSR_IA32_XSS during initialization, while kernel 5.4 does not do such write.
Once guest writes to MSR_IA32_XSS, it would be trapped to hypervisor, then,
physical MSR_IA32_XSS and the value of MSR_IA32_XSS in vcpu->arch.guest_msrs
are updated with the value specified by guest. So, in the point 2 above,
correct processor state is saved. And #GP would not happen in the point 3.

This patch initializes the XSAVE related processor state for guest.
If vcpu is not launched yet, the processor state is initialized according to
the initial value of vcpu_get_guest_msr(vcpu, MSR_IA32_XSS), ectx->xcr0,
and ectx->xs_area. With this approach, the physical processor state is
consistent with the one presented to guest.

Tracked-On: #6434

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Li Fei1 <fei1.li@intel.com>
2021-08-19 15:58:17 +08:00
Kunhui-Li 491a10a3d6 config_tools: update lpc slot number in script
Update lpc slot to origin value 1 from 31 in the script too,
because GOP driver has assumption to config space layout of
the device on 00:1f.0.

Tracked-On: #6340
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
2021-08-19 09:12:43 +08:00
Yifan Liu 73641d0680 hv: ve820: Minor changes to prelaunched VM ve820 mapping
Since previous patch to enlarge ACPI NVS/Data region from
960K(reclaim)/64K(NVS) to 960K(reclaim)/1M(NVS), some hard-coded
constants in create_prelaunched_vm_e820 were left unchanged.
This may results in failure to map the ACPI NVS region because the
remaining memory size was wrong.

This patch updates the constants and comments of function
create_prelaunched_vm_e820.

Tracked-On: #6423
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
2021-08-18 21:38:23 +08:00
Junjie Mao eb8cf6cd64 config_tools: rename two missed PSRAMs to SSRAMs
The term PSRAM is now obsoleted and should be replaced with SSRAM, as has been
done by commit 9facbb43b3 ("config-tool: rename PSRAM to SSRAM"). However,
there are two places in the configuration toolset that still uses PSRAM. This
patch updates these missed occurrences accordingly.

Tracked-On: #6012
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-08-18 21:37:06 +08:00
Kunhui-Li 4befee968a config_tools: disable TPM2 passthrough on other platforms
Disables TPM2 passthrough on other platforms except TGL
follow the 6410 PR.

Tracked-On: #6288
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
2021-08-18 18:27:44 +08:00
Kunhui-Li 970b2c3e25 config_tools: rename python script
1. rename “cli.py” to “board_inspector.py”,
   and update the script name in README file.
2. rename “app.py” to “acrn_configurator.py”.

Tracked-On: #6417
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
2021-08-18 16:48:36 +08:00
Liang Yi 8553a1d35d hv: use per platform maximum physical address width
MAXIMUM_PA_WIDTH will be calculated from board information.

Tracked-On: #6357
Signed-off-by: Liang Yi <yi.liang@intel.com>
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-08-18 16:26:25 +08:00
Liang Yi 67c06564f7 hv: mask off LA57 in cpuid
Mask off support of 57-bit linear addresses and five-level paging.

ICX-D has LA57 but ACRN doesn't support 5-level paging yet.

Tracked-On: #6357
Signed-off-by: Liang Yi <yi.liang@intel.com>
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2021-08-18 16:26:25 +08:00
Kunhui-Li 96aa6ed373 config_tools: remove some tags check for scenario.xml in generic_board folder
remove some tags check for scenario xml files in generic_board folder when
importing a new type of board in UI, and minor fix for the warning of config
editor.

Tracked-On: #6315
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
2021-08-18 15:29:33 +08:00