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acrn-config: modify whl-ipc-i7 default industry xml 

modify whl-ipc-i7 default industry xml to avoid build issue.

Tracked-On: #4913
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
This commit is contained in:
Wei Liu 2020-06-08 13:51:40 +08:00 committed by wenlingz
parent 60d16feda6
commit cd1895d1e7
2 changed files with 5 additions and 0 deletions
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4
misc/acrn-config/library/scenario_cfg_lib.py
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@ -588,6 +588,10 @@ def check_vuart(v0_vuart, v1_vuart):
def vcpu_clos_check(cpus_per_vm, clos_per_vm, prime_item, item): def vcpu_clos_check(cpus_per_vm, clos_per_vm, prime_item, item):
if not board_cfg_lib.is_rdt_supported():
return
common_clos_max = 0 common_clos_max = 0
cdp_enabled = cdp_enabled = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "CDP_ENABLED") cdp_enabled = cdp_enabled = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "CDP_ENABLED")
(rdt_resources, rdt_res_clos_max, _) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE) (rdt_resources, rdt_res_clos_max, _) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)

1
misc/acrn-config/xmls/config-xmls/whl-ipc-i7/industry.xml
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@ -136,6 +136,7 @@
</cpu_affinity> </cpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution."> <clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
<vcpu_clos>0</vcpu_clos> <vcpu_clos>0</vcpu_clos>
<vcpu_clos>0</vcpu_clos>
</clos> </clos>
<epc_section configurable="0" desc="epc section"> <epc_section configurable="0" desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base> <base desc="SGX EPC section base, must be page aligned">0</base>