board_inspector: avoid hard-coded topo level names
While the terms to refer to CPU topology levels are originally borrowed from MSR listings in SDMs (i.e. thread, core, die and package), we now align the topology information with the CPUID topology enumeration leaf (which does not have a "package" level) in the implementation. However, some hard-coded level types are not updated accordingly, leading to strangely organized nodes in the generated board XML. This patch refines the CPU extractor of the board inspector by removing such hard code. Also the XPATH counting the total number of threads is refined to tolerate the variance of reported intermediate levels. Tracked-On: #6689 Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This commit is contained in:
parent
526ce5abcf
commit
b5b22bf98b
|
@ -74,8 +74,8 @@ def extract_topology(processors_node):
|
||||||
while True:
|
while True:
|
||||||
leaf_topo = parse_cpuid(topo_leaf, subleaf, cpu_id)
|
leaf_topo = parse_cpuid(topo_leaf, subleaf, cpu_id)
|
||||||
if leaf_topo.level_type == 0:
|
if leaf_topo.level_type == 0:
|
||||||
if last_node.tag != "package":
|
if last_node.tag != level_types[-1]:
|
||||||
n, _ = get_or_create_parent(processors_node, "die", "0")
|
n, _ = get_or_create_parent(processors_node, level_types[-1], "0x0")
|
||||||
n.append(last_node)
|
n.append(last_node)
|
||||||
last_node = n
|
last_node = n
|
||||||
processors_node.append(last_node)
|
processors_node.append(last_node)
|
||||||
|
|
|
@ -61,7 +61,7 @@
|
||||||
</xsl:template>
|
</xsl:template>
|
||||||
|
|
||||||
<xsl:template name="MAX_PCPU_NUM">
|
<xsl:template name="MAX_PCPU_NUM">
|
||||||
<xsl:value-of select="acrn:define('MAX_PCPU_NUM', count(//processors/die/core/thread), 'U')" />
|
<xsl:value-of select="acrn:define('MAX_PCPU_NUM', count(//processors//thread), 'U')" />
|
||||||
</xsl:template>
|
</xsl:template>
|
||||||
|
|
||||||
<xsl:template name="MAX_VMSIX_ON_MSI_PDEVS_NUM">
|
<xsl:template name="MAX_VMSIX_ON_MSI_PDEVS_NUM">
|
||||||
|
|
Loading…
Reference in New Issue