hv: cleanup inline assembly code in vmx.c a little bit
1. We could explicitly use specific register to avoid one more register allocated. 2. If we explicitly assign register, it's not neccessary to add the register in clobber list according to gcc mannual. 3. For vmptrld, we add memory to clobber list also. Signed-off-by: Yin Fengwei <fengwei.yin@intel.com> Reviewed-by: Edwin Zhai <edwin.zhai@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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@ -55,12 +55,12 @@ static inline int exec_vmxon(void *addr)
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/* Ensure previous operations successful */
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/* Ensure previous operations successful */
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if (status == 0) {
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if (status == 0) {
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/* Turn VMX on */
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/* Turn VMX on */
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asm volatile ("mov %1, %%rax\n"
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asm volatile (
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"vmxon (%%rax)\n"
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"vmxon (%%rax)\n"
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"pushfq\n"
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"pushfq\n"
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"pop %0\n":"=r" (rflags)
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"pop %0\n":"=r" (rflags)
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: "r"(addr)
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: "a"(addr)
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: "%rax", "cc", "memory");
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: "cc", "memory");
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/* if carry and zero flags are clear operation success */
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/* if carry and zero flags are clear operation success */
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if ((rflags & (RFLAGS_C | RFLAGS_Z)) != 0U) {
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if ((rflags & (RFLAGS_C | RFLAGS_Z)) != 0U) {
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@ -153,12 +153,12 @@ int exec_vmclear(void *addr)
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ASSERT(status == 0, "Incorrect arguments");
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ASSERT(status == 0, "Incorrect arguments");
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asm volatile (
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asm volatile (
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"mov %1, %%rax\n"
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"vmclear (%%rax)\n"
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"vmclear (%%rax)\n"
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"pushfq\n"
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"pushfq\n"
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"pop %0\n":"=r" (rflags)
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"pop %0\n"
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: "r"(addr)
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:"=r" (rflags)
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: "%rax", "cc", "memory");
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: "a"(addr)
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: "cc", "memory");
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/* if carry and zero flags are clear operation success */
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/* if carry and zero flags are clear operation success */
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if ((rflags & (RFLAGS_C | RFLAGS_Z)) != 0U) {
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if ((rflags & (RFLAGS_C | RFLAGS_Z)) != 0U) {
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@ -179,13 +179,12 @@ int exec_vmptrld(void *addr)
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ASSERT(status == 0, "Incorrect arguments");
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ASSERT(status == 0, "Incorrect arguments");
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asm volatile (
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asm volatile (
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"mov %1, %%rax\n"
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"vmptrld (%%rax)\n"
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"vmptrld (%%rax)\n"
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"pushfq\n"
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"pushfq\n"
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"pop %0\n"
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"pop %0\n"
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: "=r" (rflags)
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: "=r" (rflags)
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: "r"(addr)
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: "a"(addr)
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: "%rax", "cc");
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: "cc", "memory");
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/* if carry and zero flags are clear operation success */
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/* if carry and zero flags are clear operation success */
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if ((rflags & (RFLAGS_C | RFLAGS_Z)) != 0U) {
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if ((rflags & (RFLAGS_C | RFLAGS_Z)) != 0U) {
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@ -1153,7 +1152,7 @@ static void init_host_state(__unused struct vcpu *vcpu)
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(((trbase_lo >> 56U) & 0xffUL) << 24U);
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(((trbase_lo >> 56U) & 0xffUL) << 24U);
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/* SS segment override for upper32 bits of base in ia32e mode */
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/* SS segment override for upper32 bits of base in ia32e mode */
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asm volatile ("mov %0,%%rax\n"
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asm volatile (
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".byte 0x36\n"
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".byte 0x36\n"
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"movq 8(%%rax),%%rax\n":"=a" (trbase_hi):"0"(trbase));
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"movq 8(%%rax),%%rax\n":"=a" (trbase_hi):"0"(trbase));
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realtrbase = realtrbase | (trbase_hi << 32U);
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realtrbase = realtrbase | (trbase_hi << 32U);
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