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hv: mask off LA57 in cpuid 

Mask off support of 57-bit linear addresses and five-level paging.

ICX-D has LA57 but ACRN doesn't support 5-level paging yet.

Tracked-On: #6357
Signed-off-by: Liang Yi <yi.liang@intel.com>
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
This commit is contained in:
Liang Yi 2021-08-09 14:27:47 +08:00 committed by wenlingz
parent 91777a83b5
commit 2b3620de7d
1 changed files with 3 additions and 0 deletions
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3
hypervisor/arch/x86/guest/vcpuid.c
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@ -121,6 +121,9 @@ static void init_vcpuid_entry(uint32_t leaf, uint32_t subleaf,
entry->ebx &= ~(CPUID_EBX_PQM | CPUID_EBX_PQE);
/* mask LA57 */
entry->ecx &= ~CPUID_ECX_LA57;
/* mask SGX and SGX_LC */
entry->ebx &= ~CPUID_EBX_SGX;
entry->ecx &= ~CPUID_ECX_SGX_LC;