220 lines
4.9 KiB
Plaintext
220 lines
4.9 KiB
Plaintext
/*
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* Copyright (c) 2020 Gerson Fernando Budke <nandojve@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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#include <dt-bindings/i2c/i2c.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "sam4l-pinctrl.dtsi"
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/ {
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chosen {
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zephyr,flash-controller = &flashcalw;
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zephyr,entropy = &trng;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m4";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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mpu: mpu@e000ed90 {
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compatible = "arm,armv7m-mpu";
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reg = <0xe000ed90 0x40>;
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arm,num-mpu-regions = <8>;
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};
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};
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};
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sram0: memory@20000000 {
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compatible = "mmio-sram";
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};
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/**
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* HRAM1 are 4k SRAM that can be used by PicoCache or just extra
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* memory available. The PicoCache will be keep disable to ensures
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* deterministic behaviour. That way the extra memory can be
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* exclusive for USB descriptors
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*/
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sram1: memory@21000000 {
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compatible = "mmio-sram";
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reg = <0x21000000 DT_SIZE_K(4)>;
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};
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soc {
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flashcalw: flash-controller@400a0000 {
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compatible = "atmel,sam-flash-controller";
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label = "FLASH_CTRL";
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reg = <0x400a0000 0x400>;
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interrupts = <0 0>;
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peripheral-id = <32>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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label = "FLASH_0";
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};
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};
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twim0: twim@40018000 {
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compatible = "atmel,sam-i2c-twim";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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reg = <0x40018000 0x4000>;
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interrupts = <61 0>;
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peripheral-id = <4>;
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label = "TWIM_0";
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-0 = <&pa23b_twi0_twd0 &pa24b_twi0_twck0>;
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};
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twim1: twim@4001c000 {
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compatible = "atmel,sam-i2c-twim";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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reg = <0x4001c000 0x4000>;
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interrupts = <63 0>;
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peripheral-id = <6>;
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label = "TWIM_1";
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-0 = <&pb0a_twi1_twd1 &pb1a_twi1_twck1>;
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};
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twim2: twim@40078000 {
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compatible = "atmel,sam-i2c-twim";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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reg = <0x40078000 0x4000>;
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interrupts = <77 0>;
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peripheral-id = <21>;
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label = "TWIM_2";
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-0 = <&pa21e_twi2_twd2 &pa22e_twi2_twck2>;
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};
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twim3: twim@4007c000 {
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compatible = "atmel,sam-i2c-twim";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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reg = <0x4007c000 0x4000>;
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interrupts = <78 0>;
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peripheral-id = <22>;
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label = "TWIM_3";
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-0 = <&pb14c_twi3_twd3 &pb15c_twi3_twck3>;
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};
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spi0: spi@40008000 {
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compatible = "atmel,sam-spi";
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reg = <0x40008000 0x4000>;
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interrupts = <54 0>;
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peripheral-id = <1>;
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label = "SPI_0";
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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usart0: usart@40024000 {
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compatible = "atmel,sam-usart";
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reg = <0x40024000 0x4000>;
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interrupts = <65 1>;
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peripheral-id = <8>;
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status = "disabled";
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label = "USART_0";
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};
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usart1: usart@40028000 {
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compatible = "atmel,sam-usart";
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reg = <0x40028000 0x4000>;
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interrupts = <66 1>;
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peripheral-id = <9>;
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status = "disabled";
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label = "USART_1";
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};
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usart2: usart@4002c000 {
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compatible = "atmel,sam-usart";
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reg = <0x4002c000 0x4000>;
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interrupts = <67 1>;
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peripheral-id = <10>;
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status = "disabled";
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label = "USART_2";
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};
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usart3: usart@40030000 {
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compatible = "atmel,sam-usart";
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reg = <0x40030000 0x4000>;
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interrupts = <68 1>;
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peripheral-id = <11>;
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status = "disabled";
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label = "USART_3";
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};
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pinctrl@400e1000 {
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compatible = "atmel,sam-pinctrl";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x400e1000 0x400e1000 0x800>;
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gpioa: gpio@400e1000 {
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compatible = "atmel,sam4l-gpio";
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reg = <0x400e1000 0x200>;
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interrupts = <25 1>, <26 1>, <27 1>, <28 1>;
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peripheral-id = <68>;
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label = "GPIO_A";
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gpio-controller;
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#gpio-cells = <2>;
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#atmel,pin-cells = <2>;
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};
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gpiob: gpio@400e1200 {
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compatible = "atmel,sam4l-gpio";
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reg = <0x400e1200 0x200>;
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interrupts = <29 1>, <30 1>, <31 1>, <32 1>;
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peripheral-id = <68>;
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label = "GPIO_B";
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gpio-controller;
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#gpio-cells = <2>;
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#atmel,pin-cells = <2>;
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};
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gpioc: gpio@400e1400 {
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compatible = "atmel,sam4l-gpio";
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reg = <0x400e1400 0x200>;
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interrupts = <33 1>, <34 1>, <35 1>, <36 1>;
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peripheral-id = <68>;
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label = "GPIO_C";
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gpio-controller;
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#gpio-cells = <2>;
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#atmel,pin-cells = <2>;
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};
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};
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trng: random@40068000 {
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compatible = "atmel,sam-trng";
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reg = <0x40068000 0x4000>;
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interrupts = <73 0>;
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peripheral-id = <17>;
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status = "okay";
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label = "TRNG";
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};
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uid: device_uid@80020c {
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compatible = "atmel,sam4l-uid";
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reg = <0x80020c 0xf>;
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status = "okay";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <4>;
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};
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