122 lines
3.5 KiB
C
122 lines
3.5 KiB
C
/*
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* Copyright (c) 2016 Cadence Design Systems, Inc.
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <kernel_arch_data.h>
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#ifdef CONFIG_PRINTK
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#include <misc/printk.h>
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#define PR_EXC(...) printk(__VA_ARGS__)
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#else
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#define PR_EXC(...)
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#endif /* CONFIG_PRINTK */
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const NANO_ESF _default_esf = {
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{0xdeaddead}, /* sp */
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0xdeaddead, /* pc */
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};
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extern void exit(int exit_code);
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/**
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*
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* @brief Nanokernel fatal error handler
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*
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* This routine is called when fatal error conditions are detected by software
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* and is responsible only for reporting the error. Once reported, it then
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* invokes the user provided routine _SysFatalErrorHandler() which is
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* responsible for implementing the error handling policy.
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*
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* The caller is expected to always provide a usable ESF. In the event that the
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* fatal error does not have a hardware generated ESF, the caller should either
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* create its own or use a pointer to the global default ESF <_default_esf>.
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*
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* @param reason the reason that the handler was called
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* @param pEsf pointer to the exception stack frame
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*
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* @return This function does not return.
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*/
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void _NanoFatalErrorHandler(unsigned int reason, const NANO_ESF *pEsf)
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{
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switch (reason) {
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case _NANO_ERR_INVALID_TASK_EXIT:
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PR_EXC("***** Invalid Exit Software Error! *****\n");
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break;
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#if defined(CONFIG_STACK_CANARIES)
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case _NANO_ERR_STACK_CHK_FAIL:
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PR_EXC("***** Stack Check Fail! *****\n");
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break;
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#endif /* CONFIG_STACK_CANARIES */
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case _NANO_ERR_ALLOCATION_FAIL:
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PR_EXC("**** Kernel Allocation Failure! ****\n");
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break;
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default:
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PR_EXC("**** Unknown Fatal Error %d! ****\n", reason);
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break;
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}
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PR_EXC("Current thread ID = 0x%x\n"
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"Faulting instruction address = 0x%x\n",
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sys_thread_self_get(),
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pEsf->pc);
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/*
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* Now that the error has been reported, call the user implemented
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* policy
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* to respond to the error. The decisions as to what responses are
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* appropriate to the various errors are something the customer must
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* decide.
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*/
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/* TODO: call _SysFatalErrorHandler(reason, pEsf); */
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exit(253);
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}
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void FatalErrorHandler(void)
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{
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unsigned int tmpReg = 0;
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unsigned int Esf[5];
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__asm__ volatile("rsr %0, 177\n\t" : "=r"(tmpReg)); /* epc */
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Esf[0] = tmpReg;
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__asm__ volatile("rsr %0, 232\n\t" : "=r"(tmpReg)); /* exccause */
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Esf[1] = tmpReg;
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__asm__ volatile("rsr %0, 209\n\t" : "=r"(tmpReg)); /* excsave */
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Esf[2] = tmpReg;
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__asm__ volatile("rsr %0, 230\n\t" : "=r"(tmpReg)); /* ps */
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Esf[3] = tmpReg;
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__asm__ volatile("rsr %0, 238\n\t" : "=r"(tmpReg)); /* excvaddr */
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Esf[4] = tmpReg;
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PR_EXC("Error\nEPC = 0x%x\n"
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"EXCCAUSE = 0x%x\n"
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"EXCSAVE = 0x%x\n"
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"PS = 0x%x\n"
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"EXCVADDR = 0x%x\n",
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Esf[0], Esf[1], Esf[2], Esf[3], Esf[4]);
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exit(255);
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}
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void ReservedInterruptHandler(unsigned int intNo)
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{
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unsigned int tmpReg = 0;
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unsigned int Esf[5];
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__asm__ volatile("rsr %0, 177\n\t" : "=r"(tmpReg)); /* epc */
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Esf[0] = tmpReg;
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__asm__ volatile("rsr %0, 232\n\t" : "=r"(tmpReg)); /* exccause */
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Esf[1] = tmpReg;
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__asm__ volatile("rsr %0, 209\n\t" : "=r"(tmpReg)); /* excsave */
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Esf[2] = tmpReg;
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__asm__ volatile("rsr %0, 230\n\t" : "=r"(tmpReg)); /* ps */
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Esf[3] = tmpReg;
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__asm__ volatile("rsr %0, 228\n\t" : "=r"(tmpReg)); /* intenable */
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Esf[4] = tmpReg;
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PR_EXC("Error, unhandled interrupt\n"
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"EPC = 0x%x\n"
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"EXCCAUSE = 0x%x\n"
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"EXCSAVE = 0x%x\n"
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"PS = 0x%x\n"
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"INTENABLE = 0x%x\n"
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"INTERRUPT = 0x%x\n",
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Esf[0], Esf[1], Esf[2], Esf[3], Esf[4], (1 << intNo));
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exit(254);
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}
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