208 lines
5.4 KiB
C
208 lines
5.4 KiB
C
/*
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* Copyright (c) 2016 Linaro Limited.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT arm_cmsdk_timer
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#include <drivers/counter.h>
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#include <device.h>
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#include <errno.h>
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#include <init.h>
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#include <soc.h>
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#include <drivers/clock_control/arm_clock_control.h>
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#include "timer_cmsdk_apb.h"
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typedef void (*timer_config_func_t)(const struct device *dev);
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struct tmr_cmsdk_apb_cfg {
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struct counter_config_info info;
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volatile struct timer_cmsdk_apb *timer;
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timer_config_func_t timer_config_func;
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/* Timer Clock control in Active State */
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const struct arm_clock_control_t timer_cc_as;
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/* Timer Clock control in Sleep State */
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const struct arm_clock_control_t timer_cc_ss;
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/* Timer Clock control in Deep Sleep State */
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const struct arm_clock_control_t timer_cc_dss;
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};
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struct tmr_cmsdk_apb_dev_data {
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counter_top_callback_t top_callback;
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void *top_user_data;
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uint32_t load;
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};
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static int tmr_cmsdk_apb_start(const struct device *dev)
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{
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const struct tmr_cmsdk_apb_cfg * const cfg =
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dev->config;
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struct tmr_cmsdk_apb_dev_data *data = dev->data;
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/* Set the timer reload to count */
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cfg->timer->reload = data->load;
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cfg->timer->ctrl = TIMER_CTRL_EN;
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return 0;
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}
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static int tmr_cmsdk_apb_stop(const struct device *dev)
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{
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const struct tmr_cmsdk_apb_cfg * const cfg =
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dev->config;
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/* Disable the timer */
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cfg->timer->ctrl = 0x0;
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return 0;
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}
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static int tmr_cmsdk_apb_get_value(const struct device *dev, uint32_t *ticks)
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{
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const struct tmr_cmsdk_apb_cfg * const cfg =
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dev->config;
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struct tmr_cmsdk_apb_dev_data *data = dev->data;
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/* Get Counter Value */
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*ticks = data->load - cfg->timer->value;
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return 0;
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}
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static int tmr_cmsdk_apb_set_top_value(const struct device *dev,
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const struct counter_top_cfg *top_cfg)
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{
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const struct tmr_cmsdk_apb_cfg * const cfg =
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dev->config;
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struct tmr_cmsdk_apb_dev_data *data = dev->data;
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/* Counter is always reset when top value is updated. */
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if (top_cfg->flags & COUNTER_TOP_CFG_DONT_RESET) {
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return -ENOTSUP;
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}
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data->top_callback = top_cfg->callback;
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data->top_user_data = top_cfg->user_data;
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/* Store the reload value */
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data->load = top_cfg->ticks;
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/* Set value register to count */
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cfg->timer->value = top_cfg->ticks;
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/* Set the timer reload to count */
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cfg->timer->reload = top_cfg->ticks;
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/* Enable IRQ */
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cfg->timer->ctrl |= TIMER_CTRL_IRQ_EN;
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return 0;
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}
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static uint32_t tmr_cmsdk_apb_get_top_value(const struct device *dev)
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{
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struct tmr_cmsdk_apb_dev_data *data = dev->data;
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uint32_t ticks = data->load;
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return ticks;
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}
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static uint32_t tmr_cmsdk_apb_get_pending_int(const struct device *dev)
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{
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const struct tmr_cmsdk_apb_cfg * const cfg =
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dev->config;
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return cfg->timer->intstatus;
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}
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static const struct counter_driver_api tmr_cmsdk_apb_api = {
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.start = tmr_cmsdk_apb_start,
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.stop = tmr_cmsdk_apb_stop,
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.get_value = tmr_cmsdk_apb_get_value,
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.set_top_value = tmr_cmsdk_apb_set_top_value,
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.get_pending_int = tmr_cmsdk_apb_get_pending_int,
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.get_top_value = tmr_cmsdk_apb_get_top_value,
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};
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static void tmr_cmsdk_apb_isr(void *arg)
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{
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const struct device *dev = (const struct device *)arg;
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struct tmr_cmsdk_apb_dev_data *data = dev->data;
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const struct tmr_cmsdk_apb_cfg * const cfg =
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dev->config;
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cfg->timer->intclear = TIMER_CTRL_INT_CLEAR;
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if (data->top_callback) {
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data->top_callback(dev, data->top_user_data);
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}
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}
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static int tmr_cmsdk_apb_init(const struct device *dev)
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{
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const struct tmr_cmsdk_apb_cfg * const cfg =
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dev->config;
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#ifdef CONFIG_CLOCK_CONTROL
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/* Enable clock for subsystem */
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const struct device *clk =
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device_get_binding(CONFIG_ARM_CLOCK_CONTROL_DEV_NAME);
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#ifdef CONFIG_SOC_SERIES_BEETLE
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clock_control_on(clk, (clock_control_subsys_t *) &cfg->timer_cc_as);
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clock_control_on(clk, (clock_control_subsys_t *) &cfg->timer_cc_ss);
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clock_control_on(clk, (clock_control_subsys_t *) &cfg->timer_cc_dss);
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#endif /* CONFIG_SOC_SERIES_BEETLE */
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#endif /* CONFIG_CLOCK_CONTROL */
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cfg->timer_config_func(dev);
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return 0;
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}
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#define TIMER_CMSDK_INIT(inst) \
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static void timer_cmsdk_apb_config_##inst(const struct device *dev); \
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\
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static const struct tmr_cmsdk_apb_cfg tmr_cmsdk_apb_cfg_##inst = { \
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.info = { \
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.max_top_value = UINT32_MAX, \
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.freq = 24000000U, \
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.flags = 0, \
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.channels = 0U, \
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}, \
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.timer = ((volatile struct timer_cmsdk_apb *)DT_INST_REG_ADDR(inst)), \
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.timer_config_func = timer_cmsdk_apb_config_##inst, \
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.timer_cc_as = {.bus = CMSDK_APB, .state = SOC_ACTIVE, \
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.device = DT_INST_REG_ADDR(inst),}, \
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.timer_cc_ss = {.bus = CMSDK_APB, .state = SOC_SLEEP, \
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.device = DT_INST_REG_ADDR(inst),}, \
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.timer_cc_dss = {.bus = CMSDK_APB, .state = SOC_DEEPSLEEP, \
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.device = DT_INST_REG_ADDR(inst),}, \
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}; \
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\
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static struct tmr_cmsdk_apb_dev_data tmr_cmsdk_apb_dev_data_##inst = { \
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.load = UINT32_MAX, \
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}; \
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\
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DEVICE_DT_INST_DEFINE(inst, \
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tmr_cmsdk_apb_init, \
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NULL, \
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&tmr_cmsdk_apb_dev_data_##inst, \
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&tmr_cmsdk_apb_cfg_##inst, POST_KERNEL, \
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CONFIG_COUNTER_INIT_PRIORITY, \
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&tmr_cmsdk_apb_api); \
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\
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static void timer_cmsdk_apb_config_##inst(const struct device *dev) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(inst), \
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DT_INST_IRQ(inst, priority), \
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tmr_cmsdk_apb_isr, \
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DEVICE_DT_INST_GET(inst), \
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0); \
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irq_enable(DT_INST_IRQN(inst)); \
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}
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DT_INST_FOREACH_STATUS_OKAY(TIMER_CMSDK_INIT)
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