zephyr/dts/riscv
Sylvio Alves 651b448131 dtsi: esp32c3: added missing cell defs
missing address and cell size definition causes
testing failures.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2021-08-09 13:15:47 -04:00
..
espressif dtsi: esp32c3: added missing cell defs 2021-08-09 13:15:47 -04:00
starfive boards: risc-v: add BeagleV Starlight JH7100 board support 2021-06-22 08:45:00 -04:00
it8xxx2-alts-map.dtsi ITE: dts/riscv it8xxx2: add pinmux control of SHI 2021-07-27 17:42:47 -04:00
it8xxx2.dtsi ITE drivers/ite_it8xxx2_timer: re-write ite timer driver 2021-07-24 21:26:49 -04:00
microsemi-miv.dtsi
riscv32-fe310.dtsi pinmux: sifive: Convert SiFive pinmux to be devicetree based 2021-02-15 08:33:00 -05:00
riscv32-litex-vexriscv.dtsi drivers: gpio_litex: add support for changing IRQ type 2021-06-04 16:24:52 -05:00
rv32m1.dtsi
rv32m1_ri5cy.dtsi
rv32m1_zero_riscy.dtsi
telink_b91.dtsi dts: riscv: add Telink B91 PWM driver support 2021-08-05 16:11:41 +02:00
virt.dtsi