5cf2cb6a37
Replace hardcoded register addresses and values in asm_memory_management.h with Devicetree (DT) macros for LPSRAM power-down operations. This change ensures that register addresses and bank counts are dynamically obtained from the Devicetree, improving code portability and reducing the risk of errors due to manual updates. - Removed hardcoded LSPGCTL address definitions. - Updated m_ace_lpsram_power_down_entire macro to use DT_NODELABEL to fetch LPSRAM bank count and control register address - Adjusted bit field extraction logic to align with the updated register information from the Devicetree. This commit aligns with the ongoing effort to utilize Devicetree for hardware abstraction and to facilitate easier maintenance and updates to the codebase. Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com> |
||
|---|---|---|
| .. | ||
| alder_lake | ||
| apollo_lake | ||
| atom | ||
| common | ||
| elkhart_lake | ||
| intel_adsp | ||
| intel_ish | ||
| intel_niosv | ||
| intel_socfpga | ||
| intel_socfpga_std | ||
| lakemont | ||
| raptor_lake | ||